Method and apparatus for controlling firing phases of thyristors

Claim 1

A method of controlling the firing phases of thyristors, comprising: counting clock pulses having a predetermined period, by means of a counter resetting said counter each time the voltage of an ac power source crosses zero; reading out the count value of said counter at any desired moment after said resetting step and setting in said counter data obtained by correcting said count value by the use of a value corresponding to the firing phase; reading out the count value of said counter at any desired moment after said data setting step and setting in said counter data obtained by correcting said count value by the use of a value corresponding to the variation of the firing phase; and delivering an output pulse from said counter when said counter overflows, said output pulse causing firing pulses for said thyristors to be produced.

Claim 2

A method of controlling the firing phases of thyristors, comprising: counting clock pulses having a predetermined period, by means of a counter resetting said counter each time the voltage of an ac power source crosses zero; reading out the count value of said counter at any desired moment after said resetting step and setting in said counter data obtained by correcting said count value by the use of a value corresponding to the firing phase; reading out the count value of said counter at any desired moment after said data setting step and setting in said counter data obtained by correcting said count value by the use of a value corresponding to the variation of the firing phase; and delivering an output pulse from said counter when said counter overflows, said output pulse causing firing pulses for said thyristors to be produced.

Claim 7

An apparatus for controlling the firing phases of plural thyristors as a power converter connected between an ac power source and a load, comprising: synchronous signal generating means for generating a synchronous signal each time the voltage of said ac power source crosses zero; a counter for counting clock pulses having a predetermined period, said counter being reset by said synchronous signal and the firing timing of said thyristors being determined by overflow pulses delivered from said counter; a distributing circuit for properly distributing said overflow pulses to produce respective firing signals for said thyristors; and digital arithmetic processing means for periodically calculating values representative of the firing phases in accordance with a stored program, reading the count value out of said counter, setting in said counter the sum of said count value read out of said counter and said calculated value representative of said firing phase to perform the setting of said firing phases, and setting in said counter the sum of said count value read out of said counter and the variation of said calculated value representative of said firing phase to perform the alteration of said firing phases.

Claim 8

An apparatus for controlling the firing phases of plural thyristors as a power converter connected between an ac power source and a load, comprising: synchronous signal generating means for generating a synchronous signal each time the voltage of said ac power source crosses zero; a counter for counting clock pulses having a predetermined period, said counter being reset by said synchronous signal and the firing timing of said thyristors being determined by overflow pulses delivered from said counter; a distributing circuit for properly distributing said overflow pulses to produce respective firing signals for said thyristors; and digital arithmetic processing means for periodically calculating values representative of the firing phases in accordance with a stored program, reading the count value out of said counter, setting in said counter the sum of said count value read out of said counter and said calculated value representative of said firing phase to perform the setting of said firing phases, and setting in said counter the sum of said count value read out of said counter and the variation of said calculated value representative of said firing phase to perform the alteration of said firing phases.

Claim 9

An apparatus for controlling the firing phases of plural thyristors as a power converter connected between an ac power source and a load, comprising: synchronous signal generating means for generating a synchronous signal each time the voltage of said ac power source crosses zero; a counter for counting clock pulses having a predetermined period, said counter being reset by said synchronous signal and delivering overflow pulses to determine the firing timing of said thyristors; a flip-flop which is set when data is in said counter and which is reset by said synchronous signal; and digital arithmetic processing means for periodically calculating said firing phases in accordance with a stored program, setting in said counter the sum of the count value read out of said counter and the calculated value representative of the firing phase and setting said flip-flop when said flip-flop delivers no output, and adding the difference between the preceding and present calculated values representative of the firing phases to the count value read out of said counter and setting the results of such addition in said counter when said flip-flop delivers an output.

Claim 10

An apparatus for controlling the firing phases of plural thyristors as a power converter connected between an ac power source and a load, comprising: synchronous signal generating means for generating a synchronous signal each time the voltage of said ac power source crosses zero; a counter for counting clock pulses having a predetermined period, said counter being reset by said synchronous signal and delivering overflow pulses to determine the firing timing of said thyristors; a flip-flop which is set when data is in said counter and which is reset by said synchronous signal; and digital arithmetic processing means for periodically calculating said firing phases in accordance with a stored program, setting in said counter the sum of the count value read out of said counter and the calculated value representative of the firing phase and setting said flip-flop when said flip-flop delivers no output, and adding the difference between the preceding and present calculated values representative of the firing phases to the count value read out of said counter and setting the results of such addition in said counter when said flip-flop delivers an output.

Claim 11

A method of controlling the firing phase of a semiconductor element connected to an ac voltage, comprising: calculating at least twice during a half cycle of said ac voltage a control command corresponding to a phase at which a firing pulse of the semiconductor element is to be outputted; counting clock pulses having a predetermined period by means of a counter; setting in said counter each time the control command is calculated a value equivalent to that value corresponding to the calculated control command which has been set in said counter at the start time of said half cycle of said ac voltage; providing an output pulse when said counter counts to a predetermined value minus said value set in said counter; and producing the firing pulse of said semiconductor element by means of said output pulse.

Claim 12

A method of controlling the firing phase of a semiconductor element connected to an ac voltage, comprising: calculating at least twice during a half cycle of said ac voltage a control command corresponding to a phase at which a firing pulse of the semiconductor element is to be outputted; counting clock pulses having a predetermined period by means of a counter; setting in said counter each time the control command is calculated a value equivalent to that value corresponding to the calculated control command which has been set in said counter at the start time of said half cycle of said ac voltage; providing an output pulse when said counter counts to a predetermined value minus said value set in said counter; and producing the firing pulse of said semiconductor element by means of said output pulse.

Claim 18

An apparatus for controlling the firing phase of a semiconductor element connected to an ac voltage, comprising: first means for calculating at least twice during a half cycle of said ac voltage a control command corresponding to a phase at which a firing pulse of the semiconductor element is to be outputted; a counter for counting clock pulses having a predetermined period; second means for calculating, each time the control command is calculated, a count value equivalent to the calculated control command which has been obtained at the start of said half cycle of said ac voltage and a value corresponding to said calculated control command which has been set in said counter at the start of said half cycle of said ac voltage; third means for setting said count value in said counter; fourth means for providing an output pulse when said counter counts a predetermined value minus said count value set in said counter by said third means; and fifth means for producing the firing pulse of said semiconductor element in response to said output pulse of said fourth means.

Claim 19

An apparatus for controlling the firing phase of a semiconductor element connected to an ac voltage, comprising: first means for calculating at least twice during a half cycle of said ac voltage a control command corresponding to a phase at which a firing pulse of the semiconductor element is to be outputted; a counter for counting clock pulses having a predetermined period; second means for calculating, each time the control command is calculated, a count value equivalent to the calculated control command which has been obtained at the start of said half cycle of said ac voltage and a value corresponding to said calculated control command which has been set in said counter at the start of said half cycle of said ac voltage; third means for setting said count value in said counter; fourth means for providing an output pulse when said counter counts a predetermined value minus said count value set in said counter by said third means; and fifth means for producing the firing pulse of said semiconductor element in response to said output pulse of said fourth means.