US4335399A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Normalizing circuit for color printing system
Assignee: Fujifilm Holdings Corp
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Filing: 1980-06-16
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Granted: 1982-06-15
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Expires: 2000-06-16
Abstract
Abstract A normalizing circuit for conducting sensitivity correction and gamma correction by a coded signal from a computer. The coded sensitivity signal from a computer is D-A converted to an analog signal and put into an operational amplifier to be added to or subtracted from a density signal. The sensitivity corrected signal thus obtained is sent to a gamma correcting circuit. The gamma correcting circuit is composed of a plurality of analog switches, and a plurality of resistors connected in series or parallel with each other to be changed over by the analog switches. The analog switches are operated by the gamma correcting signal. An operational amplifier is controlled as to its gain by the resistance of the resistors connected with the input or the feed-back thereof.
Inventors
- 👤 Fumio Matsumoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 20:43
CPC Classifications
G; G03; G03B; G03B27/00; G03B27/72; G03B27/80
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
231 words
A normalizing circuit for conducting sensitivity correction and gamma correction in accordance with a sensitivity correcting signal and a gamma correcting signal from a computer, and in accordance with a density signal, comprising: first latching means for latching said sensitivity correcting signal from said computer, D-A converter means connected to said first latching means for converting the latched sensitivity correcting signal into an analog signal comprising an output current, current-voltage conversion means connected to said D-A converter means for converting the output current of the analog signal of the D-A converter means to a voltage output, first operational amplifier means connected to said current-voltage conversion means for combining the signal from the current-voltage conversion means with said density signal to provide an amplifier output signal, second latching means for latching said gamma correcting signal from said computer, an analog switch circuit connected to said second latching means and comprising a plurality of analog switches switchably operated by the latched gamma correcting signal, a resistor array comprising a plurality of resistors connected to said analog switches so as to be selectively connected in series or in parallel with each other as selectively connected by said analog switches, and second operational amplifier means connected to said first operational amplifier means for amplifying the amplifier output signal from said first operational amplifier means, said second operational amplifier means being connected to said resistor array.
Claim 2
Dependent Claim
231 words
A normalizing circuit for conducting sensitivity correction and gamma correction in accordance with a sensitivity correcting signal and a gamma correcting signal from a computer, and in accordance with a density signal, comprising: first latching means for latching said sensitivity correcting signal from said computer, D-A converter means connected to said first latching means for converting the latched sensitivity correcting signal into an analog signal comprising an output current, current-voltage conversion means connected to said D-A converter means for converting the output current of the analog signal of the D-A converter means to a voltage output, first operational amplifier means connected to said current-voltage conversion means for combining the signal from the current-voltage conversion means with said density signal to provide an amplifier output signal, second latching means for latching said gamma correcting signal from said computer, an analog switch circuit connected to said second latching means and comprising a plurality of analog switches switchably operated by the latched gamma correcting signal, a resistor array comprising a plurality of resistors connected to said analog switches so as to be selectively connected in series or in parallel with each other as selectively connected by said analog switches, and second operational amplifier means connected to said first operational amplifier means for amplifying the amplifier output signal from said first operational amplifier means, said second operational amplifier means being connected to said resistor array.
Claim 3
Dependent Claim
36 words
A normalizing circuit as defined in claim 1, wherein the amplifier output signal of said first operational amplifier means is provided as an input to the second operational amplifier means by way of said resistor array.
Claim 4
Dependent Claim
27 words
A normalizing circuit as defined in claim 1, wherein said first operational amplifier means additively combines the signal from the circuit-voltage conversion means with said density signal.
Claim 5
Dependent Claim
27 words
A normalizing circuit as defined in claim 1, wherein said first operational amplifier means subtractively combines the signal from the circuit-voltage conversion means with said density signal.
Claim 6
Dependent Claim
23 words
A normalizing circuit as defined in claim 1, said second operational amplifier means having an input to which said resistor array is connected.
Claim 7
Dependent Claim
24 words
A normalizing circuit as defined in claim 1, said second operational amplifier means having a feed-back circuit to which said resistor array is connected.
Claim 8
Dependent Claim
192 words
A normalizing circuit for conducting sensitivity correction and gamma correction in accordance with a sensitivity correcting signal and a gamma correcting signal from a computer, and in accordance with a density signal, comprising: first latching means for latching said sensitivity correcting signal from said computer, D-A converter means connected to said first latching means for converting the latched sensitivity correcting signal into an analog signal, first operational amplifier means connected to said D-A converter means for combining the signal from the D-A converter means with said density signal to provide an amplifier output signal, second latching means for latching said gamma correcting signal from said computer, an analog switch circuit comprising a plurality of analog switches operated by the latched gamma correcting signal, a resistor array comprising a plurality of resistors connected to said analog switches so as to be selectively connected in series or in parallel with each other, as selectively connected by said analog switches, and second operational amplifier means connected to said first operational amplifier means for amplifying the amplifier output signal from said first operational amplifier means, said second operational amplifier means being connected to said resistor array.
Claim 9
Dependent Claim
192 words
A normalizing circuit for conducting sensitivity correction and gamma correction in accordance with a sensitivity correcting signal and a gamma correcting signal from a computer, and in accordance with a density signal, comprising: first latching means for latching said sensitivity correcting signal from said computer, D-A converter means connected to said first latching means for converting the latched sensitivity correcting signal into an analog signal, first operational amplifier means connected to said D-A converter means for combining the signal from the D-A converter means with said density signal to provide an amplifier output signal, second latching means for latching said gamma correcting signal from said computer, an analog switch circuit comprising a plurality of analog switches operated by the latched gamma correcting signal, a resistor array comprising a plurality of resistors connected to said analog switches so as to be selectively connected in series or in parallel with each other, as selectively connected by said analog switches, and second operational amplifier means connected to said first operational amplifier means for amplifying the amplifier output signal from said first operational amplifier means, said second operational amplifier means being connected to said resistor array.
Claim 10
Dependent Claim
37 words
A normalizing circuit as defined in claim 7, wherein the amplifier output signal of said first operational amplifier means is provided as an input to the second operational amplifier means by way of said analog switch circuit.
Claim 11
Dependent Claim
27 words
A normalizing circuit as defined in claim 7, wherein said first operational amplifier means additively combines the signal from the D-A converter means with said density signal.
Claim 12
Dependent Claim
27 words
A normalizing circuit as defined in claim 7, wherein said first operational amplifier means subtractively combines the signal from the D-A converter means with said density signal.
Claim 13
Dependent Claim
23 words
A normalizing circuit as defined in claim 7, said second operational amplifier means having an input to which said resistor array is connected.
Claim 14
Dependent Claim
24 words
A normalizing circuit as defined in claim 7, said second operational amplifier means having a feed-back circuit to which said resistor array is connected.
References Cited (Backward Citations)
US4189742A
Cited
US4204223A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-06-14 | 1985-12-14 | 1986-06-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-06-14 | 1989-12-14 | 1990-06-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-06-14 | 1993-12-14 | 1994-06-15 | $7700.00 | Window Closed / Lapsed |