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US4331836A Expired / Lapsed US ⏱️ 0.0 years remaining

Speech synthesis integrated circuit device

Assignee: Texas Instruments Inc
•
Filing: 1979-11-16
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Granted: 1982-05-25
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Expires: 1999-11-16
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Abstract

Abstract A system incorporating an integrated circuit device or chip which digitally synthesizes human speech using a linear predictive filter. The linear predictive filter comprises a single filter stage only which contains a single multiplier for selectively multiplying a plurality of coefficients, initiating the multiplication of one coefficient at a time, by using a feedback loop with multiplexing techniques so as to input multiplexed signals to the multiplier--as contrasted to a cascade of filter stages. Thus, the single multiplier of the linear predictive filter is utilized repetitively to provide the calculations required. The system also includes a memory for storage of digital filter coefficients, a controller for selectively accessing the coefficients, and a speaker for generating audible sounds.

Inventors

  • 👤 Richard H. Wiggins, Jr.
  • 👤 George L. Brantingham

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 09:25
CPC Classifications
H; H03; H03H; H03H17/00; H03H17/02; H03H17/04; G; G09; G09B; G09B7/00; G09B7/02; G09B7/04; G10; G10L; G10L13/00; G10L13/02; G10L13/04; G10L13/047; G10L19/00

Claims Analysis

Total Claims: 32
Claim 1
Independent Claim 214 words
A system for generating synthetic human speech comprising: (a) first memory means for storing a plurality of digital speech values including digital speech values representative of digital filter coefficients; (b) second memory means for storing digital data including at least one selected address location of said first memory means; (c) controller means coupled to said first and second memory means for accessing selected portions of said plurality of digital speech values including said digital speech values representative of digital filter coefficients in said first memory means in response to said selected address location in said second memory means; (d) digital filter speech synthesis means coupled to said controller means comprising: (i) an excitation generator for generating excitation signals; (ii) a single multiplier circuit coupled to said first memory means and to said excitation generator and having a selective feedback multiplex network interconnecting the output and the input thereof in a closed feedback loop for selectively multiplying said excitation signals with said accessed digital speech values representative of digital filter coefficients in a multiplexing multiply operation; and (iii) digital-to-analog converter means for converting the output of said single multiplier circuit to analog signals representative of human speech; and (e) audio means coupled to said digital-to-analog converter means for converting said analog signals into audible sounds.
Claim 2
Independent Claim 214 words
A system for generating synthetic human speech comprising: (a) first memory means for storing a plurality of digital speech values including digital speech values representative of digital filter coefficients; (b) second memory means for storing digital data including at least one selected address location of said first memory means; (c) controller means coupled to said first and second memory means for accessing selected portions of said plurality of digital speech values including said digital speech values representative of digital filter coefficients in said first memory means in response to said selected address location in said second memory means; (d) digital filter speech synthesis means coupled to said controller means comprising: (i) an excitation generator for generating excitation signals; (ii) a single multiplier circuit coupled to said first memory means and to said excitation generator and having a selective feedback multiplex network interconnecting the output and the input thereof in a closed feedback loop for selectively multiplying said excitation signals with said accessed digital speech values representative of digital filter coefficients in a multiplexing multiply operation; and (iii) digital-to-analog converter means for converting the output of said single multiplier circuit to analog signals representative of human speech; and (e) audio means coupled to said digital-to-analog converter means for converting said analog signals into audible sounds.
Claim 3
Dependent Claim 17 words
The system according to claim 1 wherein said first memory means comprises a non-volatile read only memory.
Claim 4
Dependent Claim 13 words
The system according to claim 1 wherein said controller means comprises a microprocessor.
Claim 5
Dependent Claim 29 words
The system according to claim 3 wherein said system further includes operator input means for receiving inputs from an operator and coupled to said microprocessor for controlling said microprocessor.
Claim 6
Dependent Claim 14 words
The system according to claim 4 wherein said operator input means comprises a keyboard.
Claim 7
Dependent Claim 15 words
The system according to claim 1 wherein said single multiplier circuit is an array multiplier.
Claim 8
Dependent Claim 13 words
The system according to claim 1 wherein said audio means comprises a speaker.
Claim 9
Dependent Claim 21 words
The system according to claim 1 wherein said digital filter speech synthesis means is implemented on a single integrated circuit device.
Claim 10
Independent Claim 241 words
A system for generating synthetic human speech comprising: (a) first memory means for storing a plurality of digital speech values including digital speech values representative of digital filter coefficients; (b) second memory means for storing digital data including at least one selected address location of said first memory means; (c) digital control means coupled to said first and second memory means for accessing sequences of digital speech values including said digital speech values representative of digital filter coefficients in said first memory means in response to said selected address location in said second memory means; (d) digital filter speech synthesis means for generating analog signals representative of human speech, said digital filter speech synthesis means comprising: (i) filter excitation generator means coupled to said first memory means and responsive to selected ones of said sequences of digital speech values for generating digital excitation signals; (ii) a single multiplier circuit coupled to said first memory means and to said filter excitation generator means and having a selective feedback multiplex network interconnecting the output and the input thereof in a closed feedback loop for selectively multiplying said accessed digital speech values representative of digital filter coefficients with said digital excitation signals in a multiplexing multiply operation; (iii) digital-to-analog converter means for converting the output of said multiplier circuit to analog signals representative of human speech; and (e) audio means coupled to said digital-to-analog converter means for converting said analog signals into audible sounds.
Claim 11
Independent Claim 241 words
A system for generating synthetic human speech comprising: (a) first memory means for storing a plurality of digital speech values including digital speech values representative of digital filter coefficients; (b) second memory means for storing digital data including at least one selected address location of said first memory means; (c) digital control means coupled to said first and second memory means for accessing sequences of digital speech values including said digital speech values representative of digital filter coefficients in said first memory means in response to said selected address location in said second memory means; (d) digital filter speech synthesis means for generating analog signals representative of human speech, said digital filter speech synthesis means comprising: (i) filter excitation generator means coupled to said first memory means and responsive to selected ones of said sequences of digital speech values for generating digital excitation signals; (ii) a single multiplier circuit coupled to said first memory means and to said filter excitation generator means and having a selective feedback multiplex network interconnecting the output and the input thereof in a closed feedback loop for selectively multiplying said accessed digital speech values representative of digital filter coefficients with said digital excitation signals in a multiplexing multiply operation; (iii) digital-to-analog converter means for converting the output of said multiplier circuit to analog signals representative of human speech; and (e) audio means coupled to said digital-to-analog converter means for converting said analog signals into audible sounds.
Claim 12
Dependent Claim 15 words
The system according to claim 9 wherein said first memory means comprises a non-volatile read-only-memory.
Claim 13
Dependent Claim 15 words
The system according to claim 9 wherein said second memory means comprises a non-volatile read-only-memory.
Claim 14
Dependent Claim 14 words
The system according to claim 9 wherein said digital control means comprises a microprocessor.
Claim 15
Dependent Claim 29 words
The system according to claim 12 wherein said system further includes operator input means for receiving inputs from an operator and coupled to said microprocessor for controlling said microprocessor.
Claim 16
Dependent Claim 14 words
The system according to claim 13 wherein said operator input means comprises a keyboard.
Claim 17
Dependent Claim 15 words
The system according to claim 9 wherein said single multiplier circuit comprises an array multiplier.
Claim 18
Dependent Claim 13 words
The system according to claim 9 wherein said audio means comprises a speaker.
Claim 19
Dependent Claim 21 words
The system according to claim 9 wherein said digital filter speech synthesis means is implemented on a single integrated circuit device.
Claim 20
Independent Claim 296 words
A system for generating synthetic human speech comprising: (a) first memory means for storing a plurality of digital speech values indicative of pitch, amplitude, and digital filter coefficients; (b) second memory means for storing digital data including at least one selected address location of said first memory means; (c) controller means coupled to said first and second memory means for accessing selected portions of said plurality of digital speech values in response to said selected address location in said second memory means; (d) operator input means for receiving inputs from an operator and coupled to said controller means for directing the operation of said controller means; (e) digital filter speech synthesis means coupled to said controller means comprising: (i) an excitation generator for generating excitation signals; (ii) a single multiplier circuit having first and second inputs and being coupled to said first memory means via said first input and to said excitation generator via said second input for selectively multiplying said excitation signals with said accessed digital speech values indicative of amplitude and digital filter coefficients; (iii) a selective feedback network operatively interconnected between the output of said single multiplier circuit and said second input thereof in a closed feedback loop including an adder wherein excitation signals and intermediate products of previously accessed digital speech values are combined prior to reintroduction to said single multiplier circuit via said second input thereof in a repetitive sequence for a further multiplying operation with succeeding digital speech values indicative of amplitude and digital filter coefficients in a multiplexing multiply operation; and (iv) digital-to-analog converter means for converting the output of said single multiplier circuit to analog signals representative of human speech; and (f) audio means coupled to said digital-to-analog converter means for converting said analog signals into audible sounds.
Claim 21
Independent Claim 296 words
A system for generating synthetic human speech comprising: (a) first memory means for storing a plurality of digital speech values indicative of pitch, amplitude, and digital filter coefficients; (b) second memory means for storing digital data including at least one selected address location of said first memory means; (c) controller means coupled to said first and second memory means for accessing selected portions of said plurality of digital speech values in response to said selected address location in said second memory means; (d) operator input means for receiving inputs from an operator and coupled to said controller means for directing the operation of said controller means; (e) digital filter speech synthesis means coupled to said controller means comprising: (i) an excitation generator for generating excitation signals; (ii) a single multiplier circuit having first and second inputs and being coupled to said first memory means via said first input and to said excitation generator via said second input for selectively multiplying said excitation signals with said accessed digital speech values indicative of amplitude and digital filter coefficients; (iii) a selective feedback network operatively interconnected between the output of said single multiplier circuit and said second input thereof in a closed feedback loop including an adder wherein excitation signals and intermediate products of previously accessed digital speech values are combined prior to reintroduction to said single multiplier circuit via said second input thereof in a repetitive sequence for a further multiplying operation with succeeding digital speech values indicative of amplitude and digital filter coefficients in a multiplexing multiply operation; and (iv) digital-to-analog converter means for converting the output of said single multiplier circuit to analog signals representative of human speech; and (f) audio means coupled to said digital-to-analog converter means for converting said analog signals into audible sounds.
Claim 22
Dependent Claim 22 words
A system for generating synthetic human speech according to claim 18, wherein said first memory means comprises a non-volatile read only memory.
Claim 23
Dependent Claim 19 words
A system for generating synthetic human speech according to claim 18, wherein said operator input means comprises a keyboard.
Claim 24
Dependent Claim 20 words
A system for generating synthetic human speech according to claim 18, wherein said single multiplier circuit is an array multiplier.
Claim 25
Dependent Claim 18 words
A system for generating synthetic human speech according to claim 18, wherein said audio means comprises a speaker.
Claim 26
Dependent Claim 26 words
A system for generating synthetic human speech according to claim 18, wherein said digital filter speech synthesis means is implemented on a single integrated circuit device.
Claim 27
Independent Claim 60 words
The system according to either of claims 1 or 18, wherein the digital speech values as stored in said first memory means are in a predetermined coded format as coded digital speech values, and further including decoder means coupled between said first memory means and said controller means for decoding the coded digital speech values accessed by said controller means.
Claim 28
Dependent Claim 58 words
The system according to claim 9, wherein the digital speech values as stored in said first memory means are in a predetermined coded format as coded digital speech values, and further including decoder means coupled between said first memory means and said digital control means for decoding the coded digital speech values accessed by said digital control means.
Claim 29
Independent Claim 28 words
The system according to any of claims 1, 9, or 18, further including means operably associated with said second memory means for incrementing the address location contained therein.
Claim 30
Dependent Claim 15 words
The system according to claim 26, wherein said second memory means comprises an address register.
Claim 31
Independent Claim 36 words
The system according to any of claims 2, 10, or 19, wherein said second memory means comprises a second non-volatile read only memory separate from the first non-volatile read only memory comprising said first memory means.
Claim 32
Dependent Claim 26 words
The system according to claim 28, wherein said controller means comprises a microprocessor and said second non-volatile read only memory is included as a component thereof.

References Cited (Backward Citations)

US4060848A Cited
US3870818A Cited
US4052563A Cited
US4038495A Cited
US4022974A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-05-24 1985-11-23 1986-05-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-05-24 1989-11-23 1990-05-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-05-24 1993-11-23 1994-05-25 $7700.00 Window Closed / Lapsed

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