US4328751A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic delay blasting circuit
Assignee: Orica Explosives Technology Pty Ltd
•
Filing: 1980-05-05
•
Granted: 1982-05-11
•
Expires: 2000-05-05
Abstract
Abstract An electronic delay blasting cap (10) receives an input signal over leg wires (12, 14). The input signal is passed through a rectifier (16) to produce a D.C. signal on output lines (26, 28). The D.C. signal charges a storage capacitor (32). When the input signal is removed or the wires (12, 14) are opened or shorted, the charge storage capacitor (32) discharges through a resistor (36) to produce a voltage which charges a timing capacitor (38). When the voltage on capacitor (38) reaches the threshold voltage of a zener diode (48) the diode is rendered conductive which in turn activates an SCR (46). A resistive ignition element (44) is connected in series with the SCR (46) and the charge storage capacitor (32) and is ignited when the SCR (46) is turned on. The charge stored in capacitor (32) causes ignition of the ignition element (44).
Inventors
- 👤 Gerald L. Oswald
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:11
CPC Classifications
F; F42; F42C; F42C11/00; F42C11/06
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
106 words
A circuit for firing a resistive ignition element following a delay period, comprising: means for full-wave rectifying an input signal to produce a D.C. signal, means connected to receive said D.C. signal for storing an electrical charge, means responsive to an amplitude transition of said input signal for producing a timing signal which has a changing voltage, means for detecting when said timing signal is equal to a reference voltage, and means for transferring at least a part of said electrical charge to said resistive ignition element for ignition thereof when said means for detecting detects that said timing signal is equal to said reference voltage.
Claim 2
Dependent Claim
106 words
A circuit for firing a resistive ignition element following a delay period, comprising: means for full-wave rectifying an input signal to produce a D.C. signal, means connected to receive said D.C. signal for storing an electrical charge, means responsive to an amplitude transition of said input signal for producing a timing signal which has a changing voltage, means for detecting when said timing signal is equal to a reference voltage, and means for transferring at least a part of said electrical charge to said resistive ignition element for ignition thereof when said means for detecting detects that said timing signal is equal to said reference voltage.
Claim 3
Dependent Claim
17 words
The circuit recited in claim 1 wherein said means for full-wave rectifying is a four diode bridge.
Claim 4
Dependent Claim
29 words
The circuit recited in claim 1 wherein said means connected to receive said D.C. signal is a capacitor coupled to the output terminals of said means for full-wave rectifying.
Claim 5
Dependent Claim
24 words
The circuit recited in claim 1 wherein said means for producing a timing signal is a series combination of a resistor and a capacitor.
Claim 6
Dependent Claim
21 words
The circuit recited in claim 1 wherein said means for detecting is a zener diode connected to monitor said timing signal.
Claim 7
Dependent Claim
29 words
The circuit recited in claim 1 wherein said means for transferring is a silicon controlled rectifier connected to said resistive ignition element and activated by said means for detecting.
Claim 8
Dependent Claim
237 words
A circuit for firing a resistive ignition element following a delay period, comprising: a full-wave rectifier having input terminals for receiving an input signal to produce therefrom a D.C. output signal which has a positive polarity at a first output terminal relative to a second output terminal, a first resistor having the terminals thereof connected respectively to said first and second output terminals, a first capacitor having a first terminal thereof connected to said first output terminal and a second terminal thereof connected to a first node, a second resistor having a first terminal thereof connected to said first node and a second terminal thereof connected to said second output terminal, a second capacitor having a first terminal thereof connected to said first node and a second terminal thereof connected to a second node, a third resistor having a first terminal thereof connected to said second node and a second terminal thereof connected to said second output terminal, a silicon controlled rectifier having anode, cathode and gate terminals, the cathode terminal thereof connected to said first node, a zener diode having the anode terminal thereof connected to the gate terminal of said silicon controlled rectifier and the cathode terminal thereof connected to the said second node, and said resistive ignition element having a first terminal thereof connected to said first output terminal and a second terminal thereof connected to the anode terminal of said silicon controlled rectifier.
Claim 9
Dependent Claim
237 words
A circuit for firing a resistive ignition element following a delay period, comprising: a full-wave rectifier having input terminals for receiving an input signal to produce therefrom a D.C. output signal which has a positive polarity at a first output terminal relative to a second output terminal, a first resistor having the terminals thereof connected respectively to said first and second output terminals, a first capacitor having a first terminal thereof connected to said first output terminal and a second terminal thereof connected to a first node, a second resistor having a first terminal thereof connected to said first node and a second terminal thereof connected to said second output terminal, a second capacitor having a first terminal thereof connected to said first node and a second terminal thereof connected to a second node, a third resistor having a first terminal thereof connected to said second node and a second terminal thereof connected to said second output terminal, a silicon controlled rectifier having anode, cathode and gate terminals, the cathode terminal thereof connected to said first node, a zener diode having the anode terminal thereof connected to the gate terminal of said silicon controlled rectifier and the cathode terminal thereof connected to the said second node, and said resistive ignition element having a first terminal thereof connected to said first output terminal and a second terminal thereof connected to the anode terminal of said silicon controlled rectifier.
Claim 10
Dependent Claim
15 words
The circuit recited in claim 7 wherein said full-wave rectifier is a four diode bridge.
Claim 11
Dependent Claim
182 words
A delay firing circuit comprising: a full-wave rectifier having input terminals for receiving an input signal to produce therefrom a D.C. output signal which has a positive polarity at a first output terminal relative to a second output terminal, a first capacitor having the terminals thereof connected respectively to said first and second output terminals, a second capacitor having a first terminal thereof connected to said first output terminal and a second terminal thereof connected to a first node, a first resistor having a first terminal thereof connected to said first node and a second terminal thereof connected to said second output terminal, a silicon controlled rectifier having anode, cathode and gate terminals, the cathode terminal thereof connected to said first node, a zener diode having the anode terminal thereof connected to the gate terminal of said silicon controlled rectifier and the cathode terminal thereof connected to said first output terminal, and a resistive firing element having a first terminal thereof connected to said first output terminal and a second terminal thereof connected to the anode terminal of said silicon controlled rectifier.
Claim 12
Dependent Claim
182 words
A delay firing circuit comprising: a full-wave rectifier having input terminals for receiving an input signal to produce therefrom a D.C. output signal which has a positive polarity at a first output terminal relative to a second output terminal, a first capacitor having the terminals thereof connected respectively to said first and second output terminals, a second capacitor having a first terminal thereof connected to said first output terminal and a second terminal thereof connected to a first node, a first resistor having a first terminal thereof connected to said first node and a second terminal thereof connected to said second output terminal, a silicon controlled rectifier having anode, cathode and gate terminals, the cathode terminal thereof connected to said first node, a zener diode having the anode terminal thereof connected to the gate terminal of said silicon controlled rectifier and the cathode terminal thereof connected to said first output terminal, and a resistive firing element having a first terminal thereof connected to said first output terminal and a second terminal thereof connected to the anode terminal of said silicon controlled rectifier.
Claim 13
Dependent Claim
15 words
The circuit recited in claim 9 wherein said full-wave rectifier is a four diode bridge.
References Cited (Backward Citations)
US3206612A
Cited
US3306208A
Cited
US3312869A
Cited
US3316451A
Cited
US3343493A
Cited
US3424924A
Cited
US3618519A
Cited
US3610153A
Cited
US3640224A
Cited
US4145970A
Cited
US4227461A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-05-10 | 1985-11-09 | 1986-05-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-05-10 | 1989-11-09 | 1990-05-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-05-10 | 1993-11-09 | 1994-05-11 | $7700.00 | Window Closed / Lapsed |