Electrical signal processing

Claim 2

An electrical circuit arrangement responsive to an input signal for producing an output signal dependent on its root mean square value, comprising squaring means responsive to the input signal for producing a squared signal proportional to the square of the input signal, averaging means connected to receive the squared signal to produce an average signal proportional to the mean of the squared signal, means connected to receive the average signal to take the square root of the average signal to produce the said output signal, switching means operative at spaced time instants to disconnect the input signal from the input of the squaring means and to maintain it disconnected each time for a predetermined duration, feedback means connected to the output of the squaring means and operative when the input signal is disconnected from the input of the squaring means to produce a feedback signal of such polarity and magnitude as substantially to null any output produced by the squaring means during that predetermined duration, storage means connected to receive the feedback signal during each said predetermined duration and to store it from the end of that duration until the next following predetermined duration, and means connected to apply the stored feedback signal to the output of the squaring means between those said predetermined durations so as to tend to continue to offset any output produced by the squaring means between those durations.

Claim 3

An electrical circuit arrangement responsive to an input signal for producing an output signal dependent on its root mean square value, comprising squaring means comprising a multiplying circuit having inputs respectively connected to receive signals X1, X2, Y1 and Y2 and arranged to produce a product output dependent on the product (X1-X2). (Y1-Y2), the input signal being connected to the X1 and Y1 inputs, averaging means connected to receive the said product output and to average it, means feeding to the X2 and Y2 inputs of the multiplying circuit signals respectively equal to the output of the averaging means and equal to the inverse of that output, the averaging means having a gain which is sufficiently high that its output is proportional to the root mean square of the input signal and is the said output signal, and switching means operative at spaced time instants to disconnect the input signal from the input of the squaring means and to maintain it disconnected each time for a predetermined duration, feedback means connected to the output of the squaring means and operative when the input signal is disconnected from the input of the squaring means to produce a feedback signal of such polarity and magnitude as substantially to null any output produced by the squaring means during that predetermined duration, storage means connected to receive the feedback signal during each said predetermined duration and to store it from the end of that duration until the next following predetermined duration, and means connected to apply the stored feedback signal to the output of the squaring means between those said predetermined durations so as to tend to continue to offset any output produced by the squaring means between those durations.

Claim 4

An electrical circuit arrangement responsive to an input signal for producing an output signal dependent on its root mean square value, comprising squaring means comprising a multiplying circuit having inputs respectively connected to receive signals X1, X2, Y1 and Y2 and arranged to produce a product output dependent on the product (X1-X2). (Y1-Y2), the input signal being connected to the X1 and Y1 inputs, averaging means connected to receive the said product output and to average it, means feeding to the X2 and Y2 inputs of the multiplying circuit signals respectively equal to the output of the averaging means and equal to the inverse of that output, the averaging means having a gain which is sufficiently high that its output is proportional to the root mean square of the input signal and is the said output signal, and switching means operative at spaced time instants to disconnect the input signal from the input of the squaring means and to maintain it disconnected each time for a predetermined duration, feedback means connected to the output of the squaring means and operative when the input signal is disconnected from the input of the squaring means to produce a feedback signal of such polarity and magnitude as substantially to null any output produced by the squaring means during that predetermined duration, storage means connected to receive the feedback signal during each said predetermined duration and to store it from the end of that duration until the next following predetermined duration, and means connected to apply the stored feedback signal to the output of the squaring means between those said predetermined durations so as to tend to continue to offset any output produced by the squaring means between those durations.

Claim 5

A circuit arrangement according to claim 1 or 2, in which the feedback means includes second averaging means for averaging variations in any output produced by the squaring means during each said predetermined duration so that the feedback signal is independent of alternating components in the output from the squaring means which are dependent on noise and substantially offsets d.c. components due to noise and zero drift.

Claim 6

A circuit arrangement according to claim 3, in which the first-mentioned averaging means comprises an amplifier and a capacitor connected across the amplifier to render it operative as an integrating amplifier.

Claim 7

A circuit arrangement according to claim 4, in which the feedback means comprises means arranged to temporarily disconnect the capacitor of the first-mentioned averaging means during the said predetermined durations and a second integrating amplifier and means operative only during each said predetermined duration to connect the second integrating amplifier in a negative feedback sense across the first-mentioned averaging means.

Claim 8

A circuit arrangement according to claim 5, in which the means for storing the feedback signal comprises a capacitor connected across the second integrating amplifier.

Claim 9

A circuit arrangement according to claim 1 or 2, including second storage means connected to temporarily store, for the length of each predetermined duration, the value of the output signal immediately before the start of that duration and including means presenting the stored signal as the output signal during that duration.

Claim 10

A circuit arrangement according to claim 1 or 2, including means connected to operate the switching means randomly or pseudo-randomly.

Claim 11

A circuit arrangement according to claim 1 or 2, in which the switching means comprises a plurality of field effect transistors and multi-vibrator means connected to control the conductions of the field effect transistors.

Claim 12

An electrical multiplying circuit arrangement, comprising first and second transistors connected together, first and second input terminals connected to the first and second transistors such that their respective conductions vary in opposite directions in response to changes in a first signal (X1-X2) applied between the first and second input terminals, third and fourth transistors, third and fourth terminals connected to the third and fourth transistors and means connecting the third and fourth transistors in parallel so that their respective conductions vary together in response to a change in a second signal (Y1-Y2) applied between the third and fourth input terminals, means connecting the third and fourth transistors to the first and second transistors so that the gains of the third and fourth transistors are varied by the conductions through the first and second transistors respectively whereby the difference between the conductions of the third and fourth transistors is dependent on the product of the first and second signals, means connecting the collector of the third transistor to the first transistor, means connecting the collector of the fourth transistor to the second transistor, and means biasing the third and fourth transistors so that when the second signal is zero changes in their conductions due to changes in their gains resulting from changes in the first signal are substantially balanced by the changes in conductions through the collectors of the first and second transistors.

Claim 13

An electrical multiplying circuit arrangement, comprising first and second transistors connected together, first and second input terminals connected to the first and second transistors such that their respective conductions vary in opposite directions in response to changes in a first signal (X1-X2) applied between the first and second input terminals, third and fourth transistors, third and fourth terminals connected to the third and fourth transistors and means connecting the third and fourth transistors in parallel so that their respective conductions vary together in response to a change in a second signal (Y1-Y2) applied between the third and fourth input terminals, means connecting the third and fourth transistors to the first and second transistors so that the gains of the third and fourth transistors are varied by the conductions through the first and second transistors respectively whereby the difference between the conductions of the third and fourth transistors is dependent on the product of the first and second signals, means connecting the collector of the third transistor to the first transistor, means connecting the collector of the fourth transistor to the second transistor, and means biasing the third and fourth transistors so that when the second signal is zero changes in their conductions due to changes in their gains resulting from changes in the first signal are substantially balanced by the changes in conductions through the collectors of the first and second transistors.

Claim 14

A circuit arrangement according to claim 10, including means connecting the collector circuits of the third and fourth transistors in parallel, each collector circuit including a respective collector load across which first and second outputs are taken in dependence on the said product, a fifth transistor, a sixth transistor, and means connecting the third and fourth terminals to the bases of the fifth and sixth transistors and connecting the emitters of the third and fourth transistors together and in series with the collector-emitter path of the fifth transistor and coupling the fifth and sixth transistors together so that variation of the second signal varies the conductions equally of the third and fourth transistors.

Claim 15

A circuit arrangement according to claim 11, including seventh and eighth transistors which have coupled emitters, means connecting the first and second transistors respectively in series with the collector-emitter paths of the seventh and eighth transistors, whereby variation of the first signal varies in opposite directions the conductions through the seventh and eighth transistors, and consequently through the base-emitter diodes of the first and second transistors, when the second signal is applied between the bases of the seventh and eighth transistors.

Claim 16

A circuit arrangement according to claim 11, including a differential amplifier, and means connecting the first and second outputs to the opposite polarity inputs of the differential amplifier.

Claim 17

An electrical circuit arrangement responsive to an input signal for producing an output signal dependent on its root mean square value, comprising squaring means responsive to the input signal for producing a squared signal proportional to the square of the input signal, averaging means responsive to the squared signal to produce an average signal proportional to the mean of the squared signal, means for taking the square root of the average signal to produce the said output signal, switching means operative at spaced time instants to disconnect the input signal from the input of the squaring means and to maintain it disconnected each time for a predetermined duration, feedback means connected to the output of the squaring means and operative when the input signal is disconnected from the squaring means to produce a feedback signal of such polarity and magnitude as substantially to offset any output produced by the squaring means during that predetermined duration, and means for storing that feedback signal between the said predetermined durations and applying it as a correcting signal to the output of the squaring means, the squaring means comprising a multiplying circuit according to claim 10, and including means connecting the input signal between the first and third input terminals of the multiplying circuit, the means for taking the square root of the said average signal comprising means for feeding to the second and fourth input terminals of the multiplying circuit signals respectively equal to the output of the averaging means and equal to the inverse of that output, the averaging means having a gain which is sufficiently high that its output is proportional to the root mean square of the input signal.

Claim 18

A circuit arrangement according to claim 1 or 2, including means producing a constant correction signal and means feeding the constant correction signal to the input of the squaring means to offset nonlinearities in the output thereof.