Pressure measuring system

Claim 2

A capacitance to digital conversion system comprising: means for generating first and second alternating reference signals having a predetermined phase relationship therebetween; a primary sensing capacitor for measuring a condition driven by one of said reference signals; a digital-to-analog converter driven by one of said reference signals for converting a digital signal to a first alternating feedback signal; means for generating a second alternating feedback signal having a predetermined phase relationship with the first alternating feedback signal; a feedback reference capacitor driven by one of said feedback signals; a feedback sensing capacitor sensitive to said condition driven by the other of said feedback signals; means, connected to the primary and feedback capacitors, for generating an error signal related to the sensed condition when currents through the primary and feedback capacitors are other than equal and opposite; and analog-to-digital converting means for converting said error signal to said digital signal wherein said digital signal is fed back to the digital-to-analog converter for conversion thereby to the first alternating feedback signal and is a measurement of said condition.

Claim 3

A digital measuring system comprising: means for generating first and second alternating excitation signals out of phase with each other; a primary reference capacitor, excited by one of said excitation signals, having a relatively invariable capacitance; a primary sensing capacitor, excited by the other of said excitation signals, having a capacitance which changes with variances in a sensed parameter; means for receiving the output of the excited primary capacitors, for generating an error signal related to the sensed parameter; means for counting at a predetermined rate, said counting means enabled by the presence of said error signal; a digital-to-analog converter for converting the count from said counter means into a first alternating feedback signal having the same phase as that of the excitation signal of said primary reference capacitor; means for generating a second alternating feedback signal identical with said first feedback signal except out of phase therewith; a feedback reference capacitor, excited by said second feedback signal, having a relatively invariable capacitance; a feedback condition sensing capacitor, excited by said first feedback signal, having a capacitance which changes with variances in said sensed parameter; and means for summing the outputs of said feedback capacitors with the outputs of said primary capacitors to null said error signal.

Claim 4

A digital measuring system comprising: means for generating first and second alternating excitation signals out of phase with each other; a primary reference capacitor, excited by one of said excitation signals, having a relatively invariable capacitance; a primary sensing capacitor, excited by the other of said excitation signals, having a capacitance which changes with variances in a sensed parameter; means for receiving the output of the excited primary capacitors, for generating an error signal related to the sensed parameter; means for counting at a predetermined rate, said counting means enabled by the presence of said error signal; a digital-to-analog converter for converting the count from said counter means into a first alternating feedback signal having the same phase as that of the excitation signal of said primary reference capacitor; means for generating a second alternating feedback signal identical with said first feedback signal except out of phase therewith; a feedback reference capacitor, excited by said second feedback signal, having a relatively invariable capacitance; a feedback condition sensing capacitor, excited by said first feedback signal, having a capacitance which changes with variances in said sensed parameter; and means for summing the outputs of said feedback capacitors with the outputs of said primary capacitors to null said error signal.

Claim 5

A capacitance to digital conversion system comprising: means for generating first and second alternating reference signals having a predetermined phase relationship therebetween; a primary reference capacitor driven by one of said reference signals; a primary sensing capacitor for measuring a condition driven by the other of said reference signals; a digital-to-analog converter driven by one of said reference signals for converting a digital signal to a first alternating feedback signal; means for generating a second alternating feedback signal having a predetermined phase relationship with the first alternating feedback signal; a feedback reference capacitor driven by one of said feedback signals; a feedback sensing capacitor for measuring said condition driven by the other of said feedback signals; means, connected to the primary and feedback capacitors, for generating an error signal related to the sensed conditions when currents through said primary and feedback capacitors are other than equal and opposite, said error signal generating means including means for summing the currents of said primary and feedback capacitors and means for amplifying said error signal; and analog-to-digital converting means for converting said error signal to said digital signal wherein said digital signal is fed back to said digital-to-analog converter for conversion thereby to said first alternating feedback signal and is a measurement of said condition, said analog-to-digital converting means including means for generating a ramp signal having a rate of change proportional to the magnitude of said error signal, first comparator means for generating at an output thereof a count up signal when the value of the ramp signal is greater than an upper bound, second comparator means generating at an output thereof a count down signal when the value of the ramp signal is less than a lower bound, a digital counter with a count up input and with a count down input, and logic means connected to the comparators and connected to the count up and count down inputs of the counter for increasing the contents of the counter in response to a count up signal and for decreasing the contents of the counter in response to a count down signal.

Claim 6

A capacitance to digital conversion system comprising: means for generating first and second alternating reference signals having a predetermined phase relationship therebetween; a primary reference capacitor driven by one of said reference signals; a primary sensing capacitor for measuring a condition driven by the other of said reference signals; a digital-to-analog converter driven by one of said reference signals for converting a digital signal to a first alternating feedback signal; means for generating a second alternating feedback signal having a predetermined phase relationship with the first alternating feedback signal; a feedback reference capacitor driven by one of said feedback signals; a feedback sensing capacitor for measuring said condition driven by the other of said feedback signals; means, connected to the primary and feedback capacitors, for generating an error signal related to the sensed conditions when currents through said primary and feedback capacitors are other than equal and opposite, said error signal generating means including means for summing the currents of said primary and feedback capacitors and means for amplifying said error signal; and analog-to-digital converting means for converting said error signal to said digital signal wherein said digital signal is fed back to said digital-to-analog converter for conversion thereby to said first alternating feedback signal and is a measurement of said condition, said analog-to-digital converting means including means for generating a ramp signal having a rate of change proportional to the magnitude of said error signal, first comparator means for generating at an output thereof a count up signal when the value of the ramp signal is greater than an upper bound, second comparator means generating at an output thereof a count down signal when the value of the ramp signal is less than a lower bound, a digital counter with a count up input and with a count down input, and logic means connected to the comparators and connected to the count up and count down inputs of the counter for increasing the contents of the counter in response to a count up signal and for decreasing the contents of the counter in response to a count down signal.

Claim 7

The system of claim 3, wherein the logic means comprises: a monostable multivibrator with an input and an output; a first gate with an output connected to the input of the multivibrator and with inputs connected to the outputs of said comparator means for triggering the monostable multivibrator when the outputs of the comparator means change states; a second gate, with an output, having one input connected to the output of one of the comparator means and having another input; a third gate, with an output, having an input connected to the output of the other comparator means and having another input, the other input of the third gate being connected to the output of the second gate and the other input of the second gate being connected to the output of the third gate; a fourth gate with an output conncted to the count up input, with one input connected to the output of the multivibrator and with another input connected to the output of the second gate; a fifth gate with an output connected to the count down input, with one input connected to the output of the multivibrator and with another input connected to the output of the third gate.

Claim 8

The system of claim 3, wherein said analog-to-digital converting means further comprises: switch means, connected in parallel with said ramp generating means, for nulling said ramp signal; and control means responsive to said count up and down signals and connected to said switch means for closing said switch means when the count up and down signals change states.

Claim 9

The system of claim 4, wherein said analog-to-digital converting means further comprises: controlled switch means with a control input and connected in parallel with said integrating means for closing to null said ramp signal in response to a control signal applied to the control input thereof; and a sixth gate with an output connected to the control input of the controlled switch means, with one input connected to the output of the first gate and with an other input connected to the output of the multivibrator, said sixth gate generating said control signal when the comparators and the multivibrator are in selected states.

Claim 10

The system of claim 3, wherein the digital-to-analog converter comprises: a ratiometric attenuator with an output terminal, with a reference input coupled to receive one of the alternating reference signals, and with inputs coupled to outputs of said digital counter, the attenuator generating at its output terminal an attenuated reference signal, the attenuation of which is proportional to the output of the analog-to-digital converting means, the attenuated reference signal comprising said first alternating feedback signal.

Claim 11

The circuit of claim 3, wherein: said primary sensing and reference capacitors are disposed within a transducer of the capacitive type, said transducer comprising a hollow body having spaced opposing walls of insulating material supported at their edges, the portions of the walls spaced from the edges being deflectable relative to one another in response to changes in pressure and the portions of the walls adjacent the edges being substantially nondeflectable relative to one another with changes in pressure, electrical conducting means on opposing surfaces of the deflectable portions of said walls forming plates of said primary condition sensing capacitor, and electrical conducting means on opposing surfaces of the substantially nondeflectable portions of said walls forming plates of said primary reference capacitor.

Claim 12

The system of claim 8, wherein: said feedback sensing and reference capacitors are disposed within a further transducer of the capacitive type, said transducer comprising a hollow body having spaced opposing walls of insulating material supported at their edges, the portions of the walls spaced from the edges being deflectable relative to one another in response to changes in pressure and the portions of the walls adjacent the edges being substantially nondeflectable relative to one another with changes in pressure, electrical conducting means on opposing surfaces of the deflectable portions of said walls forming plates of said feedback condition sensing capacitor, and electrical conducting means on opposing surfaces of the substantially nondeflectable portions of said walls forming plates of said feedback reference capacitor.

Claim 13

The system of claim 3, wherein: the values of the primary and feedback sensing capacitors are substantially equal and vary in a like manner in response to changes in said condition; the value of the primary reference capacitor is slightly less than the value of the primary sensing capacitor at a lower limit of said condition; and the value of the feedback reference capacitor is slightly less than the value of the primary reference capacitor at the lower limit of said condition.

Claim 14

The system of claim 3, wherein: the digital signal produced by the analog-to-digital converting means during substantially steady-state conditions is proportional to: ##EQU1## where C s is the primary sensing capacitor, C r is the primary reference capacitor; C fs is the feedback sensing capacitor C fr is the feedback reference capacitor, and Nmax is the maximum digital number which can be processed by the digital-to-analog converter.

Claim 17

A system as defined in claim 12 wherein said sensing element is a capacitor having a capacitance value which changes with variances in the measured parameter.

Claim 18

A system as defined in claim 13 wherein said feedback signal generating means includes: said means for counting; a digital-to-analog converter for converting the count of said counting means into an analog signal; and a feedback capacitance fed by the analog signal and connected to said error signal generating means for transmitting said feedback signal to said error signal generating means.

Claim 19

A system as defined in claim 14 wherein said counting means counts in unequal increments for variances in the error signal.

Claim 20

A system as defined in claim 14 wherein said digital-to-analog converter converts the incremental count from said counting means into unequal increments of said analog signal.

Claim 21

A system as defined in claim 14 wherein said feedback capacitance varies in unequal increments for incremental changes in said analog signal.

Claim 22

A system as defined in claim 17 wherein said feedback capacitance varies proportionately with said measured parameter.

Claim 23

A system as defined in claim 18 wherein said feedback capacitance comprises: a feedback reference capacitor having a relatively invariable capacitance; a feedback sensing capacitor having a capacitance which changes with variances in said parameter; said feedback capacitors being connected such that the feedback signal is dependent upon the value of said analog signal and the difference in values between said feedback sensing capacitor and said feedback reference capacitor.

Claim 24

A system as defined in claim 19 wherein the measured parameter is pressure.

Claim 25

A system as defined in claim 20 wherein said reference element and said sensing element are both contained in a single quartz capacitive transducer capsule.

Claim 26

A system as defined in claim 21 wherein said feedback reference capacitor and said feedback sensing capacitor are both contained in a single quartz capacitive transducer capsule.

Claim 27

A system for measuring a variable parameter as defined in claim 12 wherein said output signal generating means includes: means for storing an array of known values of said parameter corresponding to known values of said count; and means for interrogating said storing means with a count values corresponding to an unknown value of said parameter, said storing means generating said output signal in response to said interrogation as the stored value of the parameter corresponding to said unknown count value.

Claim 28

A system for measuring a variable parameter as defined in claim 23 further including: means for generating a temperature value indicative of the ambient temperature at which the system is measuring the parameter; wherein said storing means further includes means for storing an array of known values of said parameter corresponding to known values of said count at known values of temperature; wherein said interrogating means further includes means for interrogating said storing means with count values corresponding to an unknown value of said parameter and said temperature value; said storing means generating said output signal in response to said interrogation as the stored value of the parameter corresponding to said unknown count value at said temperature value.

Claim 29

A system for measuring a variable parameter as defined in claim 12 which further includes: means for varying the counting rate of said counting means as a function of the magnitude of the error signal.

Claim 30

A system for measuring a variable parameter as defined in claim 25, wherein: said counting rate is increased for increasing error signals and is decreased for decreasing error signals.

Claim 33

A method of measuring a pressure as defined in claim 27, wherein the steps of nulling said error signal further includes: varying the rate of incrementing the feedback signal according to the magnitude of the error signal.

Claim 34

A method of measuring a pressure as defined in claim 27 further including the step of: calibrating said output signal by storing an array of known values of pressure corresponding to known count values and measuring an unknown pressure by selecting a known pressure value as the output signal corresponding to a count value when the error signal is nulled.

Claim 35

A method of measuring a pressure as defined in claim 29, wherein the step of calibrating the output signal further includes the steps of: storing an array of known values of pressure corresponding to known values of said count at known values of temperature; reading the value of the ambient temperature at which the measurement of the unknown pressure is being made; and selecting a pressure value from said array corresponding to said count value and said temperature value of said unknown pressure.