Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
169 words
A detector circuit for processing a received signal comprising: tuner means providing an intermediate frequency signal in which first and second information signals are modulated on an intermediate-frequency carrier; means for providing a detecting signal which is synchronized with said carrier and for providing a comparing signal which is a version of said detecting signal phase shifted by π/2, including a phase-locked loop circuit formed of a phase shifter and a controlled oscillator; synchronous detecting means for synchronously detecting said intermediate frequency by said detecting signal to produce said first information signal at an output thereof; and phase comparator means for phase-comparing said intermediate frequency signal with said comparing signal and providing a control signal to control the frequency of said controlled oscillator, so that said controlled oscillator provides said detecting signal to said synchronous detecting means and to said phase shifter, and said phase shifter provides said comparing signal to said phase comparator means, said phase comparator means also providing said second information signal at an output thereof.
Claim 2
Dependent Claim
169 words
A detector circuit for processing a received signal comprising: tuner means providing an intermediate frequency signal in which first and second information signals are modulated on an intermediate-frequency carrier; means for providing a detecting signal which is synchronized with said carrier and for providing a comparing signal which is a version of said detecting signal phase shifted by π/2, including a phase-locked loop circuit formed of a phase shifter and a controlled oscillator; synchronous detecting means for synchronously detecting said intermediate frequency by said detecting signal to produce said first information signal at an output thereof; and phase comparator means for phase-comparing said intermediate frequency signal with said comparing signal and providing a control signal to control the frequency of said controlled oscillator, so that said controlled oscillator provides said detecting signal to said synchronous detecting means and to said phase shifter, and said phase shifter provides said comparing signal to said phase comparator means, said phase comparator means also providing said second information signal at an output thereof.
Claim 3
Dependent Claim
33 words
A detector circuit according to claim 1, wherein said phase-locked loop circuit further includes a low pass filter connected between said phase comparator means and said controlled oscillator to filter said control signal.
Claim 4
Dependent Claim
69 words
A detector circuit according to claim 2, wherein said tuner means includes a mixer to which the received signal is supplied and local oscillator means for supplying a signal to said mixer to mix with said received signal to produce said intermediate frequency signal; further comprising an automatic fine tuning circuit connected between said phase-locked loop circuit and said local oscillator means to control the signal of the latter.
Claim 5
Dependent Claim
36 words
A detector circuit according to claim 3, wherein said automatic fine tuning circuit includes a DC amplifier coupled to the output of said phase comparator means and a low pass filter coupled with said DC amplifier.
Claim 6
Dependent Claim
53 words
A detector circuit according to claim 1, wherein said phase comparator means includes first and second phase comparators each supplied with said intermediate frequency signal and with said comparing signal; with the first phase comparator providing said control signal to said controlled oscillator, and the second phase comparator providing said second information signal.
Claim 7
Dependent Claim
28 words
A detector circuit according to claim 5, further comprising limiter means coupled with said first phase comparator to limit the amplitude of the intermediate frequency signal supplied thereto.