US4318032A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Convergence circuit including a quadrant separator
Assignee: Panasonic Holdings Corp
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Filing: 1979-09-19
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Granted: 1982-03-02
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Expires: 1999-09-19
Abstract
Abstract A convergence circuit for use in a color television image display system comprising a modulator receiving at one input a first signal at the line frequency of the deflection circuit and at another input a second signal at the field frequency of the deflection circuit, a quadrant separator for separating the modulated signal into four sections in accordance with the polarity of the modulated signal and the respective first and second half periods of the field scan to generate four control currents corresponding respectively to the corners of a rectangular raster. The control currents are supplied through respectively adjustment potentiometers to a convergence coil to permit independent convergence of scanned points in the corners of the screen.
Inventors
- 👤 Takeshi Kureha
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 17:56
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/12; H04N9/16; H04N9/28
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
207 words
A convergence circuit for use in a television receiver having horizontal and vertical deflection systems for scanning a cathode ray beam to generate a rectangular raster on a cathode ray tube screen and at least one convergence coil for correcting the path of said beam, comprising: a first generator for generating a first signal of time-varying amplitude at a frequency synchronized with said horizontal deflection system; a second generator for generating a second signal of time-varying amplitude at a frequency synchronized with said vertical deflection system; a balanced modulator for modulating said first signal with said second signal to generate a modulated signal of a waveform symmetrical with respect to a point corresponding to the center of said raster; means for separating the waveform of said modulated signal into four components whose envelopes are symmetrical to said point so that the first signal contained in said separated components occurs in the respective quadrants of said raster in synchronism with the scanned cathode ray beam and the instantaneous amplitude of said components increases as a function of distance from the center of said raster to the corners thereof; and means for individually proportioning the amplitude of said separated components and applying the proportioned components to said convergence coil.
Claim 2
Dependent Claim
207 words
A convergence circuit for use in a television receiver having horizontal and vertical deflection systems for scanning a cathode ray beam to generate a rectangular raster on a cathode ray tube screen and at least one convergence coil for correcting the path of said beam, comprising: a first generator for generating a first signal of time-varying amplitude at a frequency synchronized with said horizontal deflection system; a second generator for generating a second signal of time-varying amplitude at a frequency synchronized with said vertical deflection system; a balanced modulator for modulating said first signal with said second signal to generate a modulated signal of a waveform symmetrical with respect to a point corresponding to the center of said raster; means for separating the waveform of said modulated signal into four components whose envelopes are symmetrical to said point so that the first signal contained in said separated components occurs in the respective quadrants of said raster in synchronism with the scanned cathode ray beam and the instantaneous amplitude of said components increases as a function of distance from the center of said raster to the corners thereof; and means for individually proportioning the amplitude of said separated components and applying the proportioned components to said convergence coil.
Claim 3
Dependent Claim
22 words
A convergence circuit as claimed in claim 1, wherein each of said first and second signals is substantially of a sawtooth waveform.
Claim 4
Dependent Claim
22 words
A convergence circuit as claimed in claim 1, wherein each of said first and second signals is substantially of a parabolic waveform.
Claim 5
Dependent Claim
20 words
A convergence crcuit as claimed in claim 1, 2 or 3, wherein said balanced modulator comprises a double balance modulator.
Claim 6
Dependent Claim
73 words
A convergence circuit as claimed in claim 1, wherein said separating means comprises: first means for separating said modulated signal into two successive components of the first and second half periods of the cycle of said first time-varying signal; and second means for separating said successively separated components respectively into successive portions of the first and second half periods of the cycle of said second time-varying signal to thereby generate said four components.
Claim 7
Dependent Claim
41 words
A convergence circuit as claimed in claim 5, wherein said first separating means comprises first and second polarity detectors for separating said modulated signal into said components according to the polarity of the modulated signal with respect to a reference level.
Claim 8
Dependent Claim
86 words
A convergence circuit as claimed in claim 3, wherein said separating means comprises: first and second polarity detectors for separating said modulated signal respectively into first and second polarity signals; first gate means for separating said first and second polarity signals respectively into two successive components of the first and second half periods of the cycle of said first time-varying signal; and second gate means for gating said four successive components during the first and second half periods of the cycle of said second time-varying signal.
Claim 9
Dependent Claim
106 words
A convergence circuit as claimed in claim 6 or 7, wherein said first polarity detector comprises: a first transistor of a given conductivity type having a base connected to receive said modulated signal from said balanced modulator; and a clipping diode connected to said first transistor for clamping an output signal of said transistor to zero voltage level; said second polarity detector comprising: a second transistor of an opposite conductivity type having a base connected to receive said modulated signal from said balanced modulator; and a clipping diode connected to said second transistor for clamping an output signal of said second transistor to zero voltage level.
Claim 10
Dependent Claim
21 words
A convergence circuit as claimed in claim 8, wherein each of said first and second transistors is in an emitter-follower configuration.
Claim 11
Dependent Claim
83 words
A convergence circuit as claimed in claim 1, 2 or 3, wherein said proportioning means comprises: a plurality of potentiometers connected in parallel between first and second terminals, the respective taps of said potentiometers being connected respectively to receive said four components; and a differential amplifier receptive of potentials developed at said first and second terminals to generate a control signal of different amplitude and polarity depending on the relative value of said potentials to one another for application to said convergence coil.
Claim 12
Dependent Claim
92 words
A convergence circuit as claimed in claim 10, wherein said proportioning means further comprises: a second plurality of potentiometers connected in parallel between first and second terminals, the respective taps of said second potentiometers being connected respectively to receive said four components, and a second differential amplifier receptive of potentials developed at said first and second terminals of said second plurality of potentiometers to generate a second control signal of different amplitude and polarity depending on the relative value of said potentials to one another for application to a second convergence coil.
References Cited (Backward Citations)
US3943279A
Cited
US4095137A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-03-01 | 1985-08-31 | 1986-03-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-03-01 | 1989-08-31 | 1990-03-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-03-01 | 1993-08-31 | 1994-03-02 | $7700.00 | Window Closed / Lapsed |