Charge-flow transistors

Claim 2

A charge-flow transistor comprising a semiconductor substrate, a source region in the substrate, a drain region in the substrate, and electrically sensitive region in the substrate between the source region and the drain region, gate means comprising a pair of interconnected highly conductive fingers with a gap between the fingers and a gap material having much less conductance than the highly conductive fingers disposed in said gap, said gap material being electrically connected to the highly conductive fingers to permit charge flow therebetween, a gate insulator sandwiched between the gap material and the electrically sensitive region, said electrically sensitive region being electrically sensitive to any bias electric field applied through the gate insulator, said bias electric field being created in said charge-flow transistor substantially totally by charge patterns in the gap material at and near the interface between the gap material and the gate insulator to provide a charge-flow transistor whose TURN-ON time t on is about equal to the TURN-OFF t off thereof.

Claim 3

A charge-flow transistor as claimed in claim 1 in which the gate means includes a highly conductive yoke interconnecting the highly conductive fingers.

Claim 4

A charge-flow transistor as claimed in claim 2 wherein the yoke and the fingers are metallized pattern, no part of the metallized pattern overlaying said electrically sensitive region.

Claim 5

A charge-flow transistor as claimed in claim 1 wherein the gate means includes a highly conductive yoke interconnecting each end of one highly conductive finger to the corresponding end of the other highly conductive finger to form a highly conductive pattern surrounding the gap material to shield the gate material from parasitic currents.

Claim 6

An instrument that includes a charge-flow transistor as claimed in claim 1 and that further includes means connected to bias the charge-flow transistor to cause electric current flow in the electrically sensitive region between the source region and the drain region and to effect TURN-ON and TURN-OFF of the transistor, and electrical circuitry connected to sense the TURN-ON time t on and the TURN-OFF time t off and to relate the same to at least one electrical property of said gap material.

Claim 7

An instrument that includes a charge-flow transistor and that further includes means connected to bias the charge-flow transistor to effect TURN-ON and TURN-OFF thereof and electrical circuit means connected to sense the TURN-ON time t on of the transistor and TURN-OFF t off thereof, said charge-flow transistor comprising a semiconductor substrate, a source region in the substrate, a drain region in the substrate, an electrically sensitive region in the substrate between the source region and the drain region, gate means comprising a highly conductive member and a gate material having much less conductance than the highly conductive member, said gate material being electrically connected to the highly conductive member to permit charge-flow therebetween, a gate insulator bridging the electrically sensitive region in the substrate between the source region and the drain region, the gate insulator being sandwiched between the gate material and the electrically sensitive region which is sensitive to any bias electric field applied through the gate insulator, said bias electric field being created in said charge-flow transistor substantially totally by charge patterns in the gate material in the part thereof adjacent the gate insulator, no part of said highly conductive member overlaying said electrically sensitive region to provide a transistor in which the time t on is about equal to the time t off , said electrical circuit means being operable to relate the magnitude of the times t on and t off to a property of said gap material.

Claim 8

An instrument that includes a charge-flow transistor and that further includes means connected to bias the charge-flow transistor to effect TURN-ON and TURN-OFF thereof and electrical circuit means connected to sense the TURN-ON time t on of the transistor and TURN-OFF t off thereof, said charge-flow transistor comprising a semiconductor substrate, a source region in the substrate, a drain region in the substrate, an electrically sensitive region in the substrate between the source region and the drain region, gate means comprising a highly conductive member and a gate material having much less conductance than the highly conductive member, said gate material being electrically connected to the highly conductive member to permit charge-flow therebetween, a gate insulator bridging the electrically sensitive region in the substrate between the source region and the drain region, the gate insulator being sandwiched between the gate material and the electrically sensitive region which is sensitive to any bias electric field applied through the gate insulator, said bias electric field being created in said charge-flow transistor substantially totally by charge patterns in the gate material in the part thereof adjacent the gate insulator, no part of said highly conductive member overlaying said electrically sensitive region to provide a transistor in which the time t on is about equal to the time t off , said electrical circuit means being operable to relate the magnitude of the times t on and t off to a property of said gap material.

Claim 9

A charge-flow transistor as claimed in claim 6 wherein the TURN-ON time t on and the TURN-OFF t off are within about an order of magnitude of each other.

Claim 10

A charge-flow transistor comprising a semiconductor substrate, a source region in the substrate, a drain in the substrate, an electrically sensitive region in the substrate between the source region and the drain region, gate means comprising a pair of interconnected highly conductive fingers and a gate material having much less conductance than the highly conductive fingers, said gate material being electrically connected to the highly conductive fingers to permit charge flow therebetween, a gate insulator bridging the electrically sensitive region in the substrate between the source region and the drain region, the gate insulator being sandwiched between the gate material and the elctrically sensitive region, said electrically sensitive region being electrically sensitive to any bias electric-field applied through the gate insulator, said bias electric-field being created in said charge-flow transistor substantially totally by charge patterns in the gate material in the part thereof adjacent the gate insulator, no part of said highly conductive portions of the gate means overlaying said electrically sensitive region.

Claim 11

A charge-flow transistor comprising a semiconductor substrate, a source region in the substrate, a drain in the substrate, an electrically sensitive region in the substrate between the source region and the drain region, gate means comprising a pair of interconnected highly conductive fingers and a gate material having much less conductance than the highly conductive fingers, said gate material being electrically connected to the highly conductive fingers to permit charge flow therebetween, a gate insulator bridging the electrically sensitive region in the substrate between the source region and the drain region, the gate insulator being sandwiched between the gate material and the elctrically sensitive region, said electrically sensitive region being electrically sensitive to any bias electric-field applied through the gate insulator, said bias electric-field being created in said charge-flow transistor substantially totally by charge patterns in the gate material in the part thereof adjacent the gate insulator, no part of said highly conductive portions of the gate means overlaying said electrically sensitive region.

Claim 12

A charge-flow transistor as claimed in claim 8 which further includes a sampling electrode, comprising a highly conductive island pad sandwiched between the gate insulator and the gate material, positioned on the opposite side of the gate insulator from the electrically sensitive region, any charge carrier movement between the sampling electrode and the gate means being through or on the gate material.

Claim 13

A charge-flow transistor comprising a semiconductor substrate, a source region in the substrate, a drain in the substrate, an electrically sensitive region in the substrate between the source region and the drain region, gate means comprising a highly conductive member and a gate material having much less conductance than the highly conductive member, said gate material being electrically connected to the highly conductive member to permit charge flow therebetween, a gate insulator, a sampling electrode, comprising a highly conductive island pad sandwiched between the gate insulator and the gate material, positioned on the opposite side of the gate insulator from the electrically sensitive region, any charge carrier movement between the sampling electrode and the gate means being through or on the gate material, said electrically sensitive region being electrically sensitive to any bias electric field applied through the gate insulator, said bias electric field being created in said charge-flow transistor substantially totally by charge patterns in the sampling electrode at and near the interface between the sampling electrode and the gate insulator.

Claim 14

A charge-flow transistor comprising a semiconductor substrate, a source region in the substrate, a drain in the substrate, an electrically sensitive region in the substrate between the source region and the drain region, gate means comprising a highly conductive member and a gate material having much less conductance than the highly conductive member, said gate material being electrically connected to the highly conductive member to permit charge flow therebetween, a gate insulator, a sampling electrode, comprising a highly conductive island pad sandwiched between the gate insulator and the gate material, positioned on the opposite side of the gate insulator from the electrically sensitive region, any charge carrier movement between the sampling electrode and the gate means being through or on the gate material, said electrically sensitive region being electrically sensitive to any bias electric field applied through the gate insulator, said bias electric field being created in said charge-flow transistor substantially totally by charge patterns in the sampling electrode at and near the interface between the sampling electrode and the gate insulator.