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US4312063A Expired / Lapsed US ⏱️ 0.0 years remaining

TDM Data reorganization apparatus

Assignee: Comsat Corp
•
Filing: 1979-09-27
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Granted: 1982-01-19
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Expires: 1999-09-27
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Abstract

Abstract A stream of data in standard PCM format is written into sequential locations of buffer memories, and subsequently read out of the memories in a different order so as to effect a reorganization of the PCM data. The reorganization of data packs all the bits associated with a single channel into a single contiguous block of time for an entire frame of data.

Inventors

  • 👤 Brady Warner

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 15:07
CPC Classifications
H; H04; H04B; H04B7/00; H04B7/14; H04B7/15; H04B7/204; H04B7/212; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04J3/0685

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 211 words
Apparatus for re-sequencing time division multiplexed (TDM) data having a plurality of frames, each frame comprising a series of consecutive data words delivered to said apparatus at a specified rate, each data word representing one of a plurality of data channels being interleaved within said frames, said apparatus comprising: a memory means having said TDM data applied to data input lines and having write address selection lines, read address selection lines, and data output lines; counting means counting at said specified rate and having a plurality of address bit outputs for applying a first sequence of addresses to said write address selection lines when said TDM data is written into said memory means and for applying a second sequence of addresses to said read address selection lines when said TDM data is read out of said memory means, said counting means including at least first and second counting subsections with said first counting subsection counting at a first rate and indicating to which of said plurality of frames each said data word belongs; said first and second sequences being different from one another whereby said read out TDM data is reorganized so as to place a plurality of data words representing a single data channel into a contiguous block of time.
Claim 2
Dependent Claim 211 words
Apparatus for re-sequencing time division multiplexed (TDM) data having a plurality of frames, each frame comprising a series of consecutive data words delivered to said apparatus at a specified rate, each data word representing one of a plurality of data channels being interleaved within said frames, said apparatus comprising: a memory means having said TDM data applied to data input lines and having write address selection lines, read address selection lines, and data output lines; counting means counting at said specified rate and having a plurality of address bit outputs for applying a first sequence of addresses to said write address selection lines when said TDM data is written into said memory means and for applying a second sequence of addresses to said read address selection lines when said TDM data is read out of said memory means, said counting means including at least first and second counting subsections with said first counting subsection counting at a first rate and indicating to which of said plurality of frames each said data word belongs; said first and second sequences being different from one another whereby said read out TDM data is reorganized so as to place a plurality of data words representing a single data channel into a contiguous block of time.
Claim 3
Dependent Claim 69 words
The apparatus of claim 1, wherein each of said data words is written in a unique location in said memory means, determined by one of said first sequence of addresses applied to said write address selection lines, and each of said data words is read from a unique location in said memory means determined by one of said second sequence of addresses applied to said read address selection lines.
Claim 4
Dependent Claim 34 words
The apparatus of claim 1 or 2, wherein a second subsection of said counting means counts at a second rate indicating to which of said plurality of data channels each said data word belongs.
Claim 5
Dependent Claim 66 words
The apparatus of claim 3, wherein said first rate when said TDM data is written into said memory means is different than said first data rate when said TDM data is read from said memory means, and said second rate when said TDM data is written into said memory means is different than said second rate when said TDM data is read from said memory means.
Claim 6
Dependent Claim 228 words
A process for re-sequencing time division multiplexed (TDM) data having a plurality of frames, each frame comprising a series of consecutive data words having a specified input rate, each data word representing one of a plurality of data channels, said data words corresponding to individual data channels being interleaved within said frames, said process comprising: incrementing counting means at said specified rate to generate a first sequence of outputs comprising a write address and a second sequence of outputs comprising a read address, said counting means including a first counting subsection incremented at a first rate and indicating to which of said plurality of frames each said data word belongs; applying said data words and said write address to a memory device during a write operation, whereby said data words are written into said memory device at locations determined by said write address; applying said read address to said memory device during a read operation, whereby said data words are read from said memory device from locations determined by said read address; said read and write addresses differing from one another such that said data words read from said memory means and are reorganized so as to place a plurality of data words representing a single data channel into a contiguous block of time; switching from said read operation to said write operation; and vice-versa, at pre-selected intervals.
Claim 7
Dependent Claim 228 words
A process for re-sequencing time division multiplexed (TDM) data having a plurality of frames, each frame comprising a series of consecutive data words having a specified input rate, each data word representing one of a plurality of data channels, said data words corresponding to individual data channels being interleaved within said frames, said process comprising: incrementing counting means at said specified rate to generate a first sequence of outputs comprising a write address and a second sequence of outputs comprising a read address, said counting means including a first counting subsection incremented at a first rate and indicating to which of said plurality of frames each said data word belongs; applying said data words and said write address to a memory device during a write operation, whereby said data words are written into said memory device at locations determined by said write address; applying said read address to said memory device during a read operation, whereby said data words are read from said memory device from locations determined by said read address; said read and write addresses differing from one another such that said data words read from said memory means and are reorganized so as to place a plurality of data words representing a single data channel into a contiguous block of time; switching from said read operation to said write operation; and vice-versa, at pre-selected intervals.
Claim 8
Dependent Claim 40 words
The process of claim 5 wherein said step of incrementing said counting means comprises incrementing a second subsection of said counting means at a second rate indicating to which of said plurality of data channels each said data word belongs.
Claim 9
Dependent Claim 42 words
The process of claim 6, further comprising: changing said first rate upon said switching from said read operation to said write operation and vice-versa; and changing said second rate upon said switching from said read operation to said write operation and vice-versa.

References Cited (Backward Citations)

GB1017591A Cited
US3632883A Cited
US3806879A Cited
US3967070A Cited
US4144406A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-01-18 1985-07-20 1986-01-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-01-18 1989-07-20 1990-01-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-01-18 1993-07-20 1994-01-19 $7700.00 Window Closed / Lapsed

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