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US4311998A Expired / Lapsed US ⏱️ 0.0 years remaining

Vector generator for a graphic console

Assignee: Thales SA
•
Filing: 1979-05-16
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Granted: 1982-01-19
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Expires: 1999-05-16
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Abstract

Abstract A vector generator for producing graphic images composed of line segments, having a discrete frequency multiplier 60 which comprises initializing means, stopping means and means for punctuating the drawing of the segments; input means for the M and N components of the segment, and a writing pointer 50 in an image memory 20. The invention may be used in graphic consoles and X, Y-plotters.

Inventors

  • 👤 Philippe Matherat

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 01:00
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/36; G09G5/39; G09G5/393; G09G1/00; G09G1/06; G09G1/08; G09G1/10; G09G5/20

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 269 words
A digital generator for digitally drawing dotted oriented line segment of predetermined length on a set of continuous grid points, the elements of said line segment, in digital form, being: the components M and N comprising respectively the projections of the segment on orthogonal X and Y axes; the direction of the segment; the type of vector to be drawn; the type of line to be drawn; characterised in that said vector generator comprises: a data bus; an address bus; means connected to said data bus for forming the dots of the segment comprising: a discrete frequency multiplier for multiplying the frequency of a clock signal by a factor N/M, starting means for enabling said dot forming means and stopping means for terminating said dot forming means; means for identifying the relative order of the parameters M and N; means for initializing said dot forming means; first and second registers connected to the data bus and to the address bus for storing data words which specify the values of the parameters M and N; a register connected to the data bus and to the address for storing an instruction word which specifies the direction of the segment and the type of segment to be drawn; a register connected to the data bus and to the address bus for storing a control word which specifies the type of line to be drawn; a writing pointer comprising two registers, namely an X register and a Y register respectively corresponding to the X and Y axes and connected to said dot forming means; and means for punctuating the drawing of a segment.
Claim 2
Dependent Claim 269 words
A digital generator for digitally drawing dotted oriented line segment of predetermined length on a set of continuous grid points, the elements of said line segment, in digital form, being: the components M and N comprising respectively the projections of the segment on orthogonal X and Y axes; the direction of the segment; the type of vector to be drawn; the type of line to be drawn; characterised in that said vector generator comprises: a data bus; an address bus; means connected to said data bus for forming the dots of the segment comprising: a discrete frequency multiplier for multiplying the frequency of a clock signal by a factor N/M, starting means for enabling said dot forming means and stopping means for terminating said dot forming means; means for identifying the relative order of the parameters M and N; means for initializing said dot forming means; first and second registers connected to the data bus and to the address bus for storing data words which specify the values of the parameters M and N; a register connected to the data bus and to the address for storing an instruction word which specifies the direction of the segment and the type of segment to be drawn; a register connected to the data bus and to the address bus for storing a control word which specifies the type of line to be drawn; a writing pointer comprising two registers, namely an X register and a Y register respectively corresponding to the X and Y axes and connected to said dot forming means; and means for punctuating the drawing of a segment.
Claim 3
Dependent Claim 126 words
A generator as claimed in claim 1, characterised in that the discrete frequency multiplier comprises: a register having a clock input, a loading/shifting input, a clearing input, a data input and a data input; an adder having two data inputs, one carry input, one data output and one carry output; a multiplexer having two control inputs, three data inputs and one data output; and a sampling trigger having one clock input, one data input and one data output, the data output of said adder being connected to a first data input of said register; the data output of said register being connected to a second data input of said adder, the carry output of said adder being connected to the data input of the sampling trigger.
Claim 4
Dependent Claim 41 words
A generator as claimed in claim 1, characterised in that the means for stopping the discrete frequency multiplier comprises a synchronous up/down counter having an activation input, a clock input, a loading input, a counting direction input and a carry output.
Claim 5
Dependent Claim 58 words
A vector generator as claimed in claim 1, characterised in that the means for punctuating the drawing of a segment comprises a synchronous counter wherein the outputs thereof are connected through a logic means to a multiplexer having four inputs and one output controlled by the digital data corresponding to the type of line segment to be drawn.
Claim 6
Dependent Claim 63 words
A vector generator as claimed in claim 1 or claim 3, characterised in that the means for punctuating the drawing of a segment comprises of means for connecting the least significant outputs of the stopping counter through a logic means to a multiplexer having four inputs and one output controlled by the digital data corresponding to the type of line to be drawn.
Claim 7
Dependent Claim 53 words
A generator as claimed in claim 1, characterised in that the initializing means comprises a two-bit, synchronous counter having a validation input, a release input and a clearing input the two outputs of said counter being applied to an "OR" gate of which the output indicates the current state of the vector generator.
Claim 8
Dependent Claim 46 words
A generator as claimed in claim 1, characterised in that the means for identifying the respective orders of the parameters M and N comprises an adder having two data inputs, the first input receiving the value N and the second input receiving the complemented value N.

References Cited (Backward Citations)

US3471847A Cited
US3938130A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-01-18 1985-07-20 1986-01-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-01-18 1989-07-20 1990-01-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-01-18 1993-07-20 1994-01-19 $7700.00 Window Closed / Lapsed

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