Transfer logic control circuitry

Claim 1

A power transfer logic controller (TLC) including a first source of power for energizing a motor bus and a second source of power selectively connectable to energize said motor bus such as in the event of a fault in said first source, said TLC comprising in combination, means for initiating a fast transfer operation including means for comparing the phase of the second source of power with the phase of the residual voltage on said motor bus, means for initiating a fast transfer if said phases are within a selected range of one another, means for initiating a synchronous transfer, transfer relay means for determining indication that the frequency of said second source is in substantial synchronism with the frequency of said residual bus voltage and initiating a transfer, means for effecting a residual voltage transfer, said residual voltage transfer control comparing the residual voltage on said motor bus to a preset reference and initiating a transfer when said motor bus residual voltage is below said reference, a sequencer means for providing timing windows for said fast transfer control and said synchronous transfer control to effect transfer within the time periods set by said synchronizer, means coupling the output of said residual voltage control to the sequencer to provide an end of period signal to said sequencer to indicate the termination of a preset time period, and means actuable by said fast transfer control circuit, said synchronous control circuit and said residual voltage control circuit to said sequencer means to effect a closure of the circuit breaker to said second source.

Claim 8

A method of transferring the power received by a motor bus from a first A.C. source of power energizing the motor bus to a second A.C. source of power energizing the motor bus consisting of the steps of: a. providing an indication of the status of the circuit breaker connecting to the first source of power; b. providing an indication of the status of the circuit breaker connecting to the second source of power; c. initiating timing windows to transfer power from the first source to the second source in a selected sequence; d. initiating a fast transfer control; e. comparing the phase of the second source with the phase of the residual voltage on said motor bus; f. transferring power when the phase between the second source and said motor bus voltage is with present range; g. initiating a synchronous control transfer timing window concurrently with that fast transfer timing window; h. providing a synchronous transfer of power if said fast transfer is not effective; i. initiating a residual voltage timing window concurrently with the fast transfer and synchronous transfer timing windows; j. determining the level of said motor bus voltage; k. initiating a transfer of the motor bus residual voltage; l. providing a timing window extending for a preset time prior to which any transfer must be accomplished, and disabling said transfer controls if said transfer has not been effective within said preset time.

Claim 9

A method of transferring the power received by a motor bus from a first A.C. source of power energizing the motor bus to a second A.C. source of power energizing the motor bus consisting of the steps of: a. providing an indication of the status of the circuit breaker connecting to the first source of power; b. providing an indication of the status of the circuit breaker connecting to the second source of power; c. initiating timing windows to transfer power from the first source to the second source in a selected sequence; d. initiating a fast transfer control; e. comparing the phase of the second source with the phase of the residual voltage on said motor bus; f. transferring power when the phase between the second source and said motor bus voltage is with present range; g. initiating a synchronous control transfer timing window concurrently with that fast transfer timing window; h. providing a synchronous transfer of power if said fast transfer is not effective; i. initiating a residual voltage timing window concurrently with the fast transfer and synchronous transfer timing windows; j. determining the level of said motor bus voltage; k. initiating a transfer of the motor bus residual voltage; l. providing a timing window extending for a preset time prior to which any transfer must be accomplished, and disabling said transfer controls if said transfer has not been effective within said preset time.