← Back to Patent Explorer
US4307441A Expired / Lapsed US ⏱️ 0.0 years remaining

Current balanced DC-to-DC converter

Assignee: Norden Systems Inc
•
Filing: 1980-07-28
•
Granted: 1981-12-22
•
Expires: 2000-07-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A novel feedback circuit for use in a DC-to-DC converter accurately adjusts the pulse width of the control pulses to a pair of switching transistors to minimize current imbalance. The switching transistors generate current pulses in the primary windings of a center tapped transformer. The feedback path senses the current pulses in the primary circuit of the transformer. A filter in the feedback path has a bandwidth centered at about the frequency of any current imbalance. The high gain, closed loop feedback path changes the slope of alternate linear ramp voltage pulses, and hence varies the pulse width of the pulses presented to the control terminals of the switching transistors.

Inventors

  • 👤 Vincent G. Bello

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 13:40
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/337; H02M3/3376; H02M3/3378

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 216 words
A DC-to-DC converter, comprising: oscillator means for providing a linear ramp voltage waveform; pulse means connected to said oscillator means for providing a pair of pulse waveforms, each waveform having a pulse alternating with the other in a push-pull manner; switch means including a pair of transistor switches, each having a control terminal for transitioning each of said transistor switches between its conducting and nonconducting state, said pair of transistor switches being connected in a push-pull configuration with said control terminals connected to receive one of said pair of pulse waveforms; a means including a transformer having a primary winding and a secondary winding, said primary winding connected to said pair of transistor switches to form a primary circuit through which current pulses pass; feedback means connected to said primary winding for sensing said current pulses therethrough, and including a filter whose bandpass characteristic is related to the frequency of any current imbalance associated with said pair of transistor switches to provide a high gain feedback signal to said oscillator means to change alternate ones of said linear ramp voltage waveform in response to any imbalance in current pulses; and whereby current imbalance in said primary circuit due to any mismatch in the storage time or saturation voltage of said pair of transistor switches is minimized.
Claim 2
Dependent Claim 216 words
A DC-to-DC converter, comprising: oscillator means for providing a linear ramp voltage waveform; pulse means connected to said oscillator means for providing a pair of pulse waveforms, each waveform having a pulse alternating with the other in a push-pull manner; switch means including a pair of transistor switches, each having a control terminal for transitioning each of said transistor switches between its conducting and nonconducting state, said pair of transistor switches being connected in a push-pull configuration with said control terminals connected to receive one of said pair of pulse waveforms; a means including a transformer having a primary winding and a secondary winding, said primary winding connected to said pair of transistor switches to form a primary circuit through which current pulses pass; feedback means connected to said primary winding for sensing said current pulses therethrough, and including a filter whose bandpass characteristic is related to the frequency of any current imbalance associated with said pair of transistor switches to provide a high gain feedback signal to said oscillator means to change alternate ones of said linear ramp voltage waveform in response to any imbalance in current pulses; and whereby current imbalance in said primary circuit due to any mismatch in the storage time or saturation voltage of said pair of transistor switches is minimized.
Claim 3
Dependent Claim 42 words
A DC-to-DC converter according to claim 1, wherein said filter includes an inductor and capacitor connected in series, and wherein the values of said inductor and said capacitor are such as to resonate at the frequency of any current imbalance signal waveform.
Claim 4
Dependent Claim 21 words
A DC-to-DC converter according to claim 2, further including a capacitor connected in said feedback to filter out high frequency signals.
Claim 5
Dependent Claim 64 words
A DC-to-DC converter according to claim 1, wherein said primary winding of said transformer includes a center tap through which current pulses are coupled to ground, and wherein said pair of transistors connected across said primary winding in a push-pull configuration, and wherein a current sensing transformer is coupled in series with said center tap of said transformer to sense current pulses passing therethrough.
Claim 6
Dependent Claim 72 words
A DC-to-DC converter according to claim 1, wherein said oscillator means further includes a pair of series connected resistors, and a capacitor, both of which generate said linear ramp voltage waveform, the slope of which is related to the values thereof, and wherein said feedback path supplies a signal of a frequency related to any current imbalance to said pair of resistors, thereby varying the slope of alternate linear ramp voltage waveforms.
Claim 7
Dependent Claim 38 words
A DC-to-DC converter according to claim 1, wherein said secondary winding is connected through a pair of diodes to provide unidirectional current pulses in a secondary circuit that are related to said current pulses in said primary circuit.
Claim 8
Dependent Claim 23 words
A DC-to-DC converter according to claim 6, further including a filter means for filtering said unidirectional pulses into a substantially DC output waveform.

References Cited (Backward Citations)

US3657631A Cited
US3859583A Cited
US4162524A Cited
US4148097A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-12-21 1985-06-22 1985-12-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-12-21 1989-06-22 1989-12-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-12-21 1993-06-22 1993-12-22 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag