Superheterodyne receiver frequency tracking circuit

Claim 2

In a superheterodyne signal receiver including an input circuit arranged to be tuned to a frequency to be received and including a signal controllable variable reactance element presenting a reactance whose value is adjusted by a tuning signal and determines the frequency to which the input circuit is tuned, and a controllable local oscillator producing an alternating signal to be mixed with a received signal to produce an intermediate frequency received signal, a synchronizing circuit comprising: a first frequency control circuit including said local oscillator; a second frequency control circuit including a controllable sampling oscillator and means connected to respond to the frequency of the output from said sampling oscillator to derive a signal related thereto and supplying that signal, as the tuning signal, to said controllable element; and control signal generating means generating first and second control signals and connected for supplying said first control signal to said first frequency control circuit for adjusting the frequency of the signal produced by said local oscillator, and for supplying said second control signal to said second frequency control circuit for adjusting the value of said tuning signal to tune said input circuit to a selected frequency, said generating means maintaining a relationship between said first and second control signals such that the output frequency of said local oscillator is adjusted to the value corresponding to the received signal frequency to which said input circuit is tuned, wherein each said frequency control circuit includes converter means connected to provide an output signal representative of the frequency of the signal produced by its associated oscillator, and oscillator control means having a first input connected to receive the output signal provided by its associated converter means, a second input connected to receive its respective control signal and an output connected to supply its associated oscillator with a setting signal which is dependent on a relation between the signals at its first and second inputs for establishing a linear relationship between its respective control signal and the frequency produced by its respective oscillator, said synchronizing circuit further comprises a source of an addition a.c. signal, and said converter means of at least one said circuit has at least two inputs one of which is connected to receive a signal derived from the signal at the output of its associated oscillator and the other of which is connected to receive the additional a.c. signal and acts to cause its output signal to be dependent on a relationship between the frequencies of the signals applied to its two inputs.

Claim 3

In a superheterodyne signal receiver input section including: an input circuit, arranged to be tuned to the frequency of a signal to be received and containing a controllable reactance the value of which is adjusted by a tuning signal and determines the frequency to which the input circuit is tuned; a controllable local oscillator producing an alternating signal to be mixed with a received signal supplied by the input circuit to produce an intermediate frequency received signal; a first frequency control loop composed of the local oscillator, a first converter connected to provide an output signal representative of the frequency of the signal produced by the local oscillator, and first oscillator control means having a first input connected to receive the output signal provided by the first converter, a second input connected to receive a first control signal and an output connected to supply the local oscillator with a setting signal to adjust the frequency of the signal produced by the local oscillator as a function of a relation between the first control signal and the output signal provided by the first converter, with the local oscillator, first converter and first oscillator control means being connected together in a loop; a second frequency control loop including a controllable sampling oscillator containing a controllable reactance the value of which determines the frequency of the signal produced by the sampling oscillator, a second converter connected to provide an output signal representative of the frequency of the signal produced by the sampling oscillator control means having a first input connected to receive the output signal provided by the second converter, a second input connected to receive a second control signal and an output connected to supply the sampling oscillator with a setting signal to adjust the frequency of the signal produced by the sampling oscillator as a function of a relation between the second control signal and the output signal provided by the second converter, and means connected to supply the tuning signal to the input circuit, the value of which tuning signal is a function of the frequency of the signal being produced by the sampling oscillator, with the sampling oscillator, second converter and second oscillator control means being connected together in a loop; and control signal generating means including a source of a reference signal and means for causing the first and second control signals to be functions of the reference signal and to be so related to one another that the input circuit is tuned to a received signal frequency corresponding to the output frequency of the local oscillator, the improvement wherein said reference signal source comprises a source of an a.c. reference frequency signal, and a third converter connected to receive the reference frequency signal and to provide said reference signal at its output for compensating undesirable changes in the output signals produced by said first and second converters as a result of external adverse influences.

Claim 4

In a superheterodyne signal receiver input section including: an input circuit, arranged to be tuned to the frequency of a signal to be received and containing a controllable reactance the value of which is adjusted by a tuning signal and determines the frequency to which the input circuit is tuned; a controllable local oscillator producing an alternating signal to be mixed with a received signal supplied by the input circuit to produce an intermediate frequency received signal; a first frequency control loop composed of the local oscillator, a first converter connected to provide an output signal representative of the frequency of the signal produced by the local oscillator, and first oscillator control means having a first input connected to receive the output signal provided by the first converter, a second input connected to receive a first control signal and an output connected to supply the local oscillator with a setting signal to adjust the frequency of the signal produced by the local oscillator as a function of a relation between the first control signal and the output signal provided by the first converter, with the local oscillator, first converter and first oscillator control means being connected together in a loop; a second frequency control loop including a controllable sampling oscillator containing a controllable reactance the value of which determines the frequency of the signal produced by the sampling oscillator, a second converter connected to provide an output signal representative of the frequency of the signal produced by the sampling oscillator control means having a first input connected to receive the output signal provided by the second converter, a second input connected to receive a second control signal and an output connected to supply the sampling oscillator with a setting signal to adjust the frequency of the signal produced by the sampling oscillator as a function of a relation between the second control signal and the output signal provided by the second converter, and means connected to supply the tuning signal to the input circuit, the value of which tuning signal is a function of the frequency of the signal being produced by the sampling oscillator, with the sampling oscillator, second converter and second oscillator control means being connected together in a loop; and control signal generating means including a source of a reference signal and means for causing the first and second control signals to be functions of the reference signal and to be so related to one another that the input circuit is tuned to a received signal frequency corresponding to the output frequency of the local oscillator, the improvement wherein said reference signal source comprises a source of an a.c. reference frequency signal, and a third converter connected to receive the reference frequency signal and to provide said reference signal at its output for compensating undesirable changes in the output signals produced by said first and second converters as a result of external adverse influences.

Claim 5

Circuit arrangement as defined in claim 2 wherein said control signal generating means comprise a common control element constituting the source of both said first and second control signals.

Claim 6

Circuit arrangement as defined in claim 3 wherein said control signal generating means further comprise signal modifying means connected to subject the output of said common control element to arithmetic operations for giving said first control signal a value which causes the output frequency of said local oscillator to be offset from the corresponding received signal frequency by a constant amount corresponding to the intermediate frequency value and for giving said second control signal a value which causes said tuning signal to tune said input circuit to a frequency corresponding to the frequency of the output of said local oscillator and differing from said local oscillator frequency by the intermediate frequency.

Claim 7

Circuit arrangement as defined in claim 4 wherein each of said first and second converters includes means establishing a linear relationship between its respective control signal and the frequency produced by its respective oscillator.

Claim 8

Circuit arrangement as defined in claim 5 wherein at least one of said control signals is an analog signal.

Claim 9

Circuit arrangement as defined in claim 6 wherein at least one said oscillator control means comprises a comparator.

Claim 10

Circuit arrangement as defined in claim 7 wherein, in said at least one loop, said comparator has two inputs, one of which is connected to the output of said converter in the same loop, said comparator having an output connected to control the frequency of said oscillator associated with the same loop, and said control signal for said loop is supplied to the second input of said comparator.

Claim 11

Circuit arrangement as defined in claim 5 wherein said converter of at least one said loop has at least two inputs for receiving a signal from the oscillator associated with said loop and the a.c. reference frequency signal signals and acts to produce an output signal having a d.c. component which varies in dependence on a relationship between the frequencies of the two input signals.

Claim 12

Circuit arrangement as defined in claim 9 wherein said third converter is connected to said reference frequency source for producing an output signal having a d.c. component proportional to the reference frequency and constituting said reference signal.

Claim 13

Circuit arrangement as defined in claim 9 wherein said converter of said at least one loop produces an output signal which changes only when there is a change in the frequency relationship of the two a.c. input signals and in proportion to this relationship.

Claim 14

Circuit arrangement as defined in claim 11 wherein said converter of said at least one loop operates to reverse the frequency relationship to which the change in the direct component of the output signal is proportional when the connections of the input signals to the two inputs of said converter are interchanged.

Claim 15

Circuit arrangement as defined in claim 9 wherein said converter of said at least one loop has a further input connected to receive a further a.c. input signal for further controlling the d.c. component of the output signal of said converter as a function of the frequency of the further input signal.

Claim 16

Circuit arrangement as defined in claim 9 wherein variation in the d.c. component of the output signal of said converter of said at least one loop is proportional to changes in the duty ratio of at least one of its input signals.

Claim 17

Circuit arrangement as defined in claim 9 wherein the d.c. component of the output of said converter of said at least one loop varies according to the relationship V=K 1 +K 2 .f 1 /f 2 , where V is the value of the d.c. component, K 1 and K 2 are constants, f 1 is the frequency of the output of its respective oscillator and f 2 is the frequency of the output of said reference frequency source.

Claim 18

Circuit arrangement as defined in claim 2 wherein all of said converters are structurally and functionally identical.

Claim 19

Circuit arrangement as defined in claim 2 or 16 wherein said controllable reactances of said input circuit and said sampling oscillator are constituted such that the values of said reactances vary in a constant ratio to one another in response to changes in the value of said second control signal.

Claim 20

Circuit arrangement as defined in claim 17 wherein said controllable reactances of said input circuit and said sampling oscillator are identical in their design and response characteristics.

Claim 21

Circuit arrangement as defined in claim 18 further comprising a single semiconductor chip presenting two identically constructed semiconductor varactor diodes, and wherein each said diode constitutes a respective one of said controllable reactances.

Claim 22

Circuit arrangement as defined in claim 19 wherein the capacitances of said two diodes bear a constant ratio to one another and further comprising two capacitors each connected in parallel with a respective diode, the values of the capacitances of said capacitors being in said constant ratio to one another.

Claim 23

Circuit arrangement as defined in claim 18 wherein said controllable reactances present controllable capacitances having capacitance values which bear a constant ratio to one another and further comprising two capacitors each connected in parallel with a respective controllable capacitance, the values of the capacitances of said capacitors being in said constant ratio to one another.

Claim 24

Circuit arrangement as defined in claim 17 wherein said controllable reactances present controllable capacitances having capacitance values which bear a constant ratio to one another and further comprising two capacitors each connected in parallel with a respective controllable capacitance, the values of the capacitances of said capacitors being in said constant ratio to one another.

Claim 25

Circuit arrangement as defined in claim 17 further comprising a single semiconductor chip presenting two identically constructed semiconductor varactor diodes, and wherein each said diode constitutes a respective one of said controllable reactances.

Claim 26

Circuit arrangement as defined in claim 2 or 16 wherein said controllable reactances of said input circuit and said sampling oscillator are identical in their design and response characteristics.

Claim 27

Circuit arrangement as defined in claim 2 or 16 further comprising a single semiconductor chip presenting two identically constructed semiconductor varactor diodes, and wherein each said diode constitutes a respective one of said controllable reactances.

Claim 28

Circuit arrangement as defined in claim 2 or 16 wherein said controllable reactances present controllable reactances present controllable capacitances having capacitance values which bear a constant ratio to one another and further comprising two capacitors each connected in parallel with a respective controllable capacitance, the values of the capacitances of said capacitors being in said constant ratio to one another.