US4301499A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Inverter circuit with current equalization
Assignee: United States Department of the Army
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Filing: 1980-06-13
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Granted: 1981-11-17
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Expires: 2000-06-13
Abstract
Abstract The unbalance in currents flowing alternately in the two halves of a doubended, push-pull inverter is obviated by means of a parallel resonant network, comprised of an inductor and capacitor, placed in series with the power supply voltage applied to the center tap of the inverter transformer primary winding. The network component values are selected to provide relatively a high impedance of the inverter fundamental operating frequency while providing a low impedance at twice the fundamental operating frequency.
Inventors
- 👤 Samuel Levinson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 21:08
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/337; H02M3/3376; H02M3/3378; Y; Y02; Y02B; Y02B70/00; Y02B70/10
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
150 words
Circuit means for equalizing the respective currents flowing alternately in two halves of a double-ended, push-pull DC to DC inverter, comprising in combination: an inverter transformer having a primary winding including a center tap and a secondary winding; means for receiving a DC supply potential; a pair of switching devices respectively coupled to opposite ends of said primary winding; control circuit means generating periodic signals of a predetermined fundamental operating frequency coupled to said switching devices for rendering said devices alternately conducting and non conducting in a mutually opposite sense; and a parallel resonant network coupled between said center tap of the primary winding and said means for receiving the DC supply potential, said resonant network having a resonant frequency substantially equal to said fundamental operating frequency and being operable thereby to produce balanced currents in said pair of switching devices and accordingly the primary winding of said inverter transformer.
Claim 2
Dependent Claim
150 words
Circuit means for equalizing the respective currents flowing alternately in two halves of a double-ended, push-pull DC to DC inverter, comprising in combination: an inverter transformer having a primary winding including a center tap and a secondary winding; means for receiving a DC supply potential; a pair of switching devices respectively coupled to opposite ends of said primary winding; control circuit means generating periodic signals of a predetermined fundamental operating frequency coupled to said switching devices for rendering said devices alternately conducting and non conducting in a mutually opposite sense; and a parallel resonant network coupled between said center tap of the primary winding and said means for receiving the DC supply potential, said resonant network having a resonant frequency substantially equal to said fundamental operating frequency and being operable thereby to produce balanced currents in said pair of switching devices and accordingly the primary winding of said inverter transformer.
Claim 3
Dependent Claim
24 words
The circuit means as defined by claim 1 wherein said parallel resonant network consists of at least one inductor and at least one capacitor.
Claim 4
Dependent Claim
42 words
The circuit means as defined by claim 2 wherein the component values of said inductor and capacitor are selected such that the impedance level at parallel resonance is relatively high in comparison to the impedance level at twice said fundamental operating frequency.
Claim 5
Dependent Claim
21 words
The circuit means as defined by claim 1 wherein said switching devices are comprised of first and second semiconductor switch devices.
Claim 6
Dependent Claim
21 words
The circuit means as defined by claim 4 wherein said first and second semiconductor switch devices are comprised of like transistors.
Claim 7
Dependent Claim
40 words
The circuit means as defined by claim 1 wherein said control circuit means comprises a pulse width modulator circuit, and additionally including circuit means coupled to said secondary winding for providing a feedback signal to said pulse width modulator circuit.
Claim 8
Dependent Claim
52 words
The circuit means as defined by claim 6 and additionally including respective driver circuit means coupled between said pulse width modulator circuit and said pair of switching devices for coupling said periodic signals thereto, said driver circuit means being coupled to said primary winding for being powered from said DC supply potential.
Claim 9
Dependent Claim
21 words
The circuit means as defined by claim 7 wherein said driver circuit means and said switching devices are comprised of transistors.
Claim 10
Dependent Claim
33 words
The circuit means as defined by claim 1 and additionally including circuit means coupled to said secondary winding for providing a DC output signal from said output currents generated in said secondary winding.
Claim 11
Dependent Claim
30 words
The circuit means as defined by claim 1 wherein said control circuit means includes means for rendering said switching devices alternately conducting and non conducting for substantially equal time periods.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-11-16 | 1985-05-18 | 1985-11-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-11-16 | 1989-05-18 | 1989-11-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-11-16 | 1993-05-18 | 1993-11-17 | $7700.00 | Window Closed / Lapsed |