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US4297597A Expired / Lapsed US ⏱️ 0.0 years remaining

Darlington-connected semiconductor device

Assignee: Toshiba Corp
•
Filing: 1979-06-13
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Granted: 1981-10-27
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Expires: 1999-06-13
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Abstract

Abstract A Darlington-connected semiconductor device comprises a pre-stage transistor having multi-emitter electrodes and a rear-stage transistor having multi-base electrodes. The multi-emitter electrodes of the pre-stage transistor are connected to the multi-base electrodes of the rear-stage transistor through a plurality of resistors, respectively.

Inventors

  • 👤 Takashi Kimura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 17:47
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/02; H10; H10D; H10D84/00; H10D84/60; H10D84/641; H10D84/642

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 152 words
A Darlington-connected semiconductor device for amplifying an input signal, comprising: a pre-stage transistor circuit portion including at least one pre-stage transistor with a plurality of emitters, a collector, and at least one base; input terminal means connected to the base of said pre-stage transistor for receiving an input signal to be amplified by said device; a rear-stage transistor circuit portion including at least one rear-stage transistor with a plurality of bases and emitters, said rear-stage transistor having a collector in common with said collector of said pre-stage transistor; a plurality of resistors connected respectively between the emitters of said pre-stage transistor and the bases of said rear-stage transistor, to connect said input terminal means to the bases of said rear-stage transistor through the emitters of said pre-stage transistor and said resistors; and output terminal means connected to the emitters of said rear-stage transistor for receiving an amplified form of said input signal.
Claim 2
Dependent Claim 152 words
A Darlington-connected semiconductor device for amplifying an input signal, comprising: a pre-stage transistor circuit portion including at least one pre-stage transistor with a plurality of emitters, a collector, and at least one base; input terminal means connected to the base of said pre-stage transistor for receiving an input signal to be amplified by said device; a rear-stage transistor circuit portion including at least one rear-stage transistor with a plurality of bases and emitters, said rear-stage transistor having a collector in common with said collector of said pre-stage transistor; a plurality of resistors connected respectively between the emitters of said pre-stage transistor and the bases of said rear-stage transistor, to connect said input terminal means to the bases of said rear-stage transistor through the emitters of said pre-stage transistor and said resistors; and output terminal means connected to the emitters of said rear-stage transistor for receiving an amplified form of said input signal.
Claim 3
Dependent Claim 38 words
A semiconductor device according to claim 1, wherein said rear-stage transistor circuit portion includes a plurality of rear-stage transistors each having multi-bases, the bases of said rear-stage transistors being connected respectively to the emitters of said pre-stage transistor.
Claim 4
Dependent Claim 38 words
A semiconductor device according to claim 2, wherein said pre-stage transistor circuit portion includes a plurality of pre-stage transistors each having multi-emitters, the multi-emitters of said pre-stage transistors being connected respectively to the bases of said rear-stage transistors.
Claim 5
Dependent Claim 43 words
A semiconductor device according to claim 1, wherein said pre-stage transistor circuit portion includes a plurality of pre-stage transistors each having multi-emitters, the multi-emitters of said pre-stage transistors being connected respectively to said plurality of bases of said rear-stage transistor through said resistors.
Claim 6
Dependent Claim 183 words
A Darlington-connected semiconductor device for amplifying an input signal, comprising: a pre-stage transistor circuit portion including at least one pre-stage transistor with a plurality of emitters, a collector, and at least one base; input terminal means connected to the base of said pre-stage transistor for receiving an input signal to be amplified by said device; a mid-stage transistor circuit portion including at least one mid-stage transistor with a plurality of bases and emitters, and having a collector connected in common with said collector of said pre-stage transistor; a plurality of first resistors connected respectively between the emitters of said pre-stage transistor and the bases of said mid-stage transistor; a rear-stage transistor circuit portion including at least one rear-stage transistor with a plurality of bases and emitters, and having a collector connected in common with collectors of said pre- and mid-stage transistors; a plurality of second resistors connected respectively between the emitters of said mid-stage transistor and the bases of said rear-stage transistor; and output terminal means connected to the emitters of said rear-stage transistor for receiving an amplified form of said input signal.
Claim 7
Dependent Claim 183 words
A Darlington-connected semiconductor device for amplifying an input signal, comprising: a pre-stage transistor circuit portion including at least one pre-stage transistor with a plurality of emitters, a collector, and at least one base; input terminal means connected to the base of said pre-stage transistor for receiving an input signal to be amplified by said device; a mid-stage transistor circuit portion including at least one mid-stage transistor with a plurality of bases and emitters, and having a collector connected in common with said collector of said pre-stage transistor; a plurality of first resistors connected respectively between the emitters of said pre-stage transistor and the bases of said mid-stage transistor; a rear-stage transistor circuit portion including at least one rear-stage transistor with a plurality of bases and emitters, and having a collector connected in common with collectors of said pre- and mid-stage transistors; a plurality of second resistors connected respectively between the emitters of said mid-stage transistor and the bases of said rear-stage transistor; and output terminal means connected to the emitters of said rear-stage transistor for receiving an amplified form of said input signal.
Claim 8
Dependent Claim 61 words
A semiconductor device according to claim 5, wherein said mid-stage transistor circuit portion includes a plurality of mid-stage transistors each having multi-bases and multi-emitters, the bases of said mid-stage transistors being connected respectively to the emitters of said pre-stage transistor through said first resistors, and said multi-emitters being connected respectively to the bases of said rear-stage transistor through said second resistors.

References Cited (Backward Citations)

US3416043A Cited
US3544860A Cited
US4119997A Cited
US4072979A Cited
US4031416A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-10-26 1985-04-27 1985-10-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-10-26 1989-04-27 1989-10-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-10-26 1993-04-27 1993-10-27 $7700.00 Window Closed / Lapsed

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