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US4295098A Expired / Lapsed US ⏱️ 0.0 years remaining

Digitally adjustable phase shifting circuit

Assignee: RCA Corp
•
Filing: 1979-12-19
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Granted: 1981-10-13
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Expires: 1999-12-19
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Abstract

Abstract A counter produces, as a function of time, an M bit count of cycles of a periodic signal. A storage device stores a changeable value represented by N bits comprising M higher order bits and N-M lower order bits. An adder produces M bits corresponding to the sum of M counter bits and M higher order bits. A digital-to-analog converter produces an alternating signal corresponding to the value of the M summed bits and N-M lower order bits where the phase of the alternating signal relative to an arbitrary reference signal corresponds to the value stored in the storage device.

Inventors

  • 👤 Albert T. Crowley

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 09:31
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/099; H03L7/0991; H03L7/0992; H03K; H03K4/00; H03K4/02; H03K4/026; H03K6/00

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 216 words
Apparatus for producing an alternating signal with a controllable phase shift, comprising in combination: means producing a periodic signal having a given period; divider means responsive to said periodic signal for producing a first digital signal changing as a function of said given period and manifested as a plurality of M bits; means for storing a value indicative of the phase of said alternating signal and for producing, in accordance with said value, a second digital signal manifested as a plurality of N bits comprising M higher order bits and N-M lower order bits and having a control terminal receptive of a control signal for changing said value, where, N≧M; means responsive to said first digital signal and second digital signal for adding ones of said M bits of said first digital signal with corresponding ones of said higher orders bits of said N bits to produce a most significant bit (MSB) and lower order bits; means responsive to said added bits and lower order ones of said N bits for producing an analog alternating signal corresponding to the value of said added and lower order bits; and means coupled to said means for storing a value for producing a control signal to change said stored value to thereby change the phase of said alternating signal.
Claim 2
Dependent Claim 216 words
Apparatus for producing an alternating signal with a controllable phase shift, comprising in combination: means producing a periodic signal having a given period; divider means responsive to said periodic signal for producing a first digital signal changing as a function of said given period and manifested as a plurality of M bits; means for storing a value indicative of the phase of said alternating signal and for producing, in accordance with said value, a second digital signal manifested as a plurality of N bits comprising M higher order bits and N-M lower order bits and having a control terminal receptive of a control signal for changing said value, where, N≧M; means responsive to said first digital signal and second digital signal for adding ones of said M bits of said first digital signal with corresponding ones of said higher orders bits of said N bits to produce a most significant bit (MSB) and lower order bits; means responsive to said added bits and lower order ones of said N bits for producing an analog alternating signal corresponding to the value of said added and lower order bits; and means coupled to said means for storing a value for producing a control signal to change said stored value to thereby change the phase of said alternating signal.
Claim 3
Dependent Claim 31 words
The combination as set forth in claim 1, wherein said divider means is an M bit digital counter responsive to each cycle of said periodic signal for advancing by one count.
Claim 4
Dependent Claim 45 words
The combination as set forth in claim 1, or claim 2, wherein said means for storing a value is an N bit digital counter storing a count representing said phase of said alternating signal responsive to said control signal for changing the count contained therein.
Claim 5
Dependent Claim 76 words
The combination as set forth in claim 1, or claim 2, wherein said means responsive to said added bits and lower order bits comprises N-1 exclusive-OR gates all receptive of said MSB, each receptive of a different one of said added bits other than said MSB and lower order ones of said N bits and further comprising a digital-to-analog converter means responsive to the output of said N-1 exclusive-OR gates for producing said analog alternating signal.
Claim 6
Dependent Claim 37 words
The combination as set forth in claim 4, wherein said means for producing said control signal comprises means for continually changing said stored value at a uniform rate to thereby alternate the frequency of said analog signal.
Claim 7
Dependent Claim 34 words
The combination as set forth in claim 5, wherein said means for continually changing said stored value comprises a voltage-to-frequency converter means and means for supplying a selected voltage thereto for determining said frequency.

References Cited (Backward Citations)

US3325721A Cited
US3500213A Cited
US3792360A Cited
US4061909A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-10-12 1985-04-13 1985-10-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-10-12 1989-04-13 1989-10-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-10-12 1993-04-13 1993-10-13 $7700.00 Window Closed / Lapsed

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