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US4286219A Expired / Lapsed US ⏱️ 0.0 years remaining

High resolution frequency synthesizer

Assignee: Comsat Corp
•
Filing: 1979-09-27
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Granted: 1981-08-25
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Expires: 1999-09-27
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Abstract

Abstract A programmable frequency source is used to synthesize a wide range of frequencies in small increments. A master oscillator and a single programmable divider are used. Each selected frequency possesses a phase jitter, predictable and a function of the master oscillator-to-output frequency relationship. The output of the frequency source is a square wave whose transitions are edge synchronous with the master oscillator.

Inventors

  • 👤 Shanti S. Gupta

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 22:14
CPC Classifications
H; H03; H03K; H03K23/00; H03K23/64; H03K23/66; H03K23/667

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 143 words
A high resolution frequency synthesizer for producing a pulse train of frequency f D comprising: an oscillator producing an output pulse train having a clock frequency of f ms , a programmable divider receiving an input signal that is a function of f ms and performing a division thereon in accordance with: [(N E +N R )f D ]/N R f D where, N E is an even number higher but not exceeding f ms /f D , and N R is the remainder of f ms /f D -N E , either a whole number or fraction but not a negative quantity to obtain an output f x , that is the frequency or number of bits per second which is an even multiple of f D and means for obtaining a symmetrical waveform from f x which is f D .
Claim 2
Dependent Claim 143 words
A high resolution frequency synthesizer for producing a pulse train of frequency f D comprising: an oscillator producing an output pulse train having a clock frequency of f ms , a programmable divider receiving an input signal that is a function of f ms and performing a division thereon in accordance with: [(N E +N R )f D ]/N R f D where, N E is an even number higher but not exceeding f ms /f D , and N R is the remainder of f ms /f D -N E , either a whole number or fraction but not a negative quantity to obtain an output f x , that is the frequency or number of bits per second which is an even multiple of f D and means for obtaining a symmetrical waveform from f x which is f D .
Claim 3
Dependent Claim 29 words
The synthesizer of claim 1 further comprising an AND gate receiving respective outputs from said oscillator and said programmable divider and producing a bit rate of f x .
Claim 4
Dependent Claim 20 words
The synthesizer of claim 2 further comprising a second divider for dividing said AND gate output by N E /2.
Claim 5
Dependent Claim 26 words
The synthesizer of claims 1, 2 or 3 wherein said means to obtain a symmetrical waveform comprises a divide by 2 divider, dividing f x .
Claim 6
Dependent Claim 48 words
The synthesizer of claims 1, 2 or 3 further comprising controller means to convert N k to N p when the time loss in one second equals 1/N p , said controller means providing said programmable divider with an input signal N p to convert N k .
Claim 7
Dependent Claim 18 words
The synthesizer of claim 5 further comprising counter means to establish a count indicative of N p .
Claim 8
Dependent Claim 21 words
The synthesizer of claim 6 wherein said counter means comprises a counter counting to a predetermined value of N p .
Claim 9
Dependent Claim 23 words
The synthesizer of claim 6 wherein said counter means comprises a programmable counter counting to a variable, programmed value of N p .

References Cited (Backward Citations)

US3293561A Cited
USB538686I5 Cited
US4105949A Cited
US4185247A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-08-24 1985-02-23 1985-08-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-08-24 1989-02-23 1989-08-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-08-24 1993-02-23 1993-08-25 $7700.00 Window Closed / Lapsed

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