US4283786A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital transmission system
Assignee: Individual
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Filing: 1979-06-26
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Granted: 1981-08-11
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Expires: 1999-06-26
Abstract
Abstract A digital transmission system in which an information signal is converted into digital data in response to a sampling pulse train, the digital data comprising a plurality of bits differing in significance from each other. Data conversion, such as complementing or reversing the order of the plurality of bits, is performed in integral multiples of every other sampling period and the converted data is transmitted over the digital transmission system to a receiver where it is reconverted back into the original digital data.
Inventors
- 👤 Shiro Okamura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 14:23
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G06; G06F; G06F11/00; G06F11/07; G06F11/14; G06F11/16; G06F11/20; G11B20/1803; H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0602; H04J3/0614
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
106 words
A digital transmission system comprising: Means responsive to a sampling pulse, occurring during successive sampling periods, for encoding an information signal into a digital signal at each of said sampling periods, said digital signal including a plurality of bits differing in significance from each other; means for converting said digital signal at integral multiples of every other sampling period to produce a converted digital signal; means for transmitting said converted digital signal to receiving apparatus, said plurality of bits in each sampling period being transmitted in time-serial sequence; and means included in said receiving apparatus for reconverting said converted digital signal back into said digital signal.
Claim 2
Dependent Claim
106 words
A digital transmission system comprising: Means responsive to a sampling pulse, occurring during successive sampling periods, for encoding an information signal into a digital signal at each of said sampling periods, said digital signal including a plurality of bits differing in significance from each other; means for converting said digital signal at integral multiples of every other sampling period to produce a converted digital signal; means for transmitting said converted digital signal to receiving apparatus, said plurality of bits in each sampling period being transmitted in time-serial sequence; and means included in said receiving apparatus for reconverting said converted digital signal back into said digital signal.
Claim 3
Dependent Claim
28 words
A digital transmission system in accordance with claim 1, wherein said converting means includes means for complementing said digital signal at integral multiples of every other sampling period.
Claim 4
Dependent Claim
32 words
A digital transmission system in accordance with claim 1, wherein said converting means includes means for reversing the order of said plurality of bits at integral multiples of every other sampling period.
Claim 5
Dependent Claim
67 words
A digital transmission system in accordance with claim 2, wherein said complementing means includes means for inverting said digital signal, said digital signal and said inverted digital signal being supplied to one input of an AND gate and one input of an INHIBIT gate respectively, a remaining input of said AND gate and said INHIBIT gate being supplied with a gating pulse derived from said sampling pulse.
Claim 6
Dependent Claim
35 words
A digital transmission system in accordance with claim 4, wherein the output of said AND gate and said INHIBIT gate are applied to respective inputs of an OR gate to produce said converted digital signal.
Claim 7
Dependent Claim
116 words
A digital transmission system in accordance with claim 3, wherein said reversing means includes a plurality of flip-flops, said plurality of flip-flops being respectively set by said plurality of bits, and reset by said sampling pulse, two groups of gates each group having a plurality of AND gates and an OR gate, said gate groups providing two sets of time-serial digital signals differing in the order of said plurality of bits from each other, and an INHIBIT gate, said two sets of time-serial digital signals being applied to one input of said AND and INHIBIT gates, and other inputs of said AND and INHIBIT gates being supplied with a control signal derived from said sampling pulse.
Claim 8
Dependent Claim
22 words
A digital transmission system in accordance with claim 1 further comprising means for amplitude-modulating said converted digital signal by an additional signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-08-10 | 1985-02-09 | 1985-08-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-08-10 | 1989-02-09 | 1989-08-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-08-10 | 1993-02-09 | 1993-08-11 | $7700.00 | Window Closed / Lapsed |