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US4274113A Expired / Lapsed US ⏱️ 0.0 years remaining

Solid-state imaging device

Assignee: Hitachi Ltd
•
Filing: 1980-02-05
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Granted: 1981-06-16
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Expires: 2000-02-05
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Abstract

Abstract A solid-state imaging device which is horizontally scanned by a discontinuous scanning pulse train, wherein an output signal of the device is integrated by a signal processing circuit which comprises an emitter follower (source follower) circuit and a capacitor disposed in parallel with the emitter follower (source follower) circuit, whereby noise components are canceled so as to derive only a video signal. With this solid-state imaging device, fixed pattern noise can be eliminated, and a good picture quality can be achieved.

Inventors

  • 👤 Shinya Ohba
  • 👤 Shuhei Tanaka
  • 👤 Masaharu Kubo
  • 👤 Haruhisa Ando
  • 👤 Yataro Yamashita
  • 👤 Shoji Hanamura
  • 👤 Masakazu Aoki
  • 👤 Masaaki Nakai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 18:56
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/60; H04N25/67; H04N25/62; H04N25/626

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 157 words
In a solid-state imaging device having a sensor portion which reads out photo information stored in a plurality of photodiodes disposed in a surface region of a semiconductor body, with a discontinuous horizontal scanning pulse train, and a signal processing circuit which integrates and eliminates noise components of video signals provided from said sensor portion; a solid-state imaging device characterized in that said signal processing circuit comprises a first emitter (source) follower circuit in which a first transistor receiving the video signals and a first load are connected in series, a second transistor which is connected in series with said first emitter (source) follower circuit and which receives a reset signal, a capacitance which is connected between a collector of said first transistor and a ground terminal, and a second emitter (source) follower circuit which receives a collector (drain) output of said first transistor and which detects an integration value of a discharge current of said capacitance.
Claim 2
Dependent Claim 157 words
In a solid-state imaging device having a sensor portion which reads out photo information stored in a plurality of photodiodes disposed in a surface region of a semiconductor body, with a discontinuous horizontal scanning pulse train, and a signal processing circuit which integrates and eliminates noise components of video signals provided from said sensor portion; a solid-state imaging device characterized in that said signal processing circuit comprises a first emitter (source) follower circuit in which a first transistor receiving the video signals and a first load are connected in series, a second transistor which is connected in series with said first emitter (source) follower circuit and which receives a reset signal, a capacitance which is connected between a collector of said first transistor and a ground terminal, and a second emitter (source) follower circuit which receives a collector (drain) output of said first transistor and which detects an integration value of a discharge current of said capacitance.
Claim 3
Dependent Claim 16 words
A solid-state imaging device according to claim 1, wherein said first transistor is a bipolar transistor.
Claim 4
Dependent Claim 16 words
A solid-state imaging device according to claim 1, wherein said first transistor is a field-effect transistor.
Claim 5
Dependent Claim 41 words
A solid-state imaging device according to claim 1, wherein said signal processing circuit further comprises a third transistor which samples and holds the output of said second emitter (source) follower circuit, and a sampling pulse is impressed on said third transistor.
Claim 6
Dependent Claim 36 words
A solid-state imaging device according to claim 1, wherein said signal processing circuit further comprises a peak detector circuit which samples and holds a peak value of the output of said second emitter (source) follower circuit.
Claim 7
Dependent Claim 34 words
A solid-state imaging device according to claim 4 or claim 5, wherein the output sampled and held is passed through a low-pass filter and is thereafter amplified by an amplifier into an output signal.
Claim 8
Dependent Claim 150 words
In a solid-state imaging device having a sensor portion which reads out photo information stored in a plurality of photodiodes disposed in a surface region of a semiconductor body, with discontinuous horizontal scanning pulses, and a signal processing circuit which integrates and eliminates noise components of video signals provided from said sensor portion; a solid-state imaging device characterized in that said signal processing circuit comprises a first emitter (source) follower circuit in which a first transistor receiving video signals and a first load are connected in series, a second transistor which is connected in series with said first emitter (source) follower circuit and which receives a reset signal, a capacitance which is connected between a collector of said first transistor and a ground terminal, and a second load which is connected in series with said second transistor and which detects an integration value of a discharge current of said capacitance.
Claim 9
Dependent Claim 150 words
In a solid-state imaging device having a sensor portion which reads out photo information stored in a plurality of photodiodes disposed in a surface region of a semiconductor body, with discontinuous horizontal scanning pulses, and a signal processing circuit which integrates and eliminates noise components of video signals provided from said sensor portion; a solid-state imaging device characterized in that said signal processing circuit comprises a first emitter (source) follower circuit in which a first transistor receiving video signals and a first load are connected in series, a second transistor which is connected in series with said first emitter (source) follower circuit and which receives a reset signal, a capacitance which is connected between a collector of said first transistor and a ground terminal, and a second load which is connected in series with said second transistor and which detects an integration value of a discharge current of said capacitance.
Claim 10
Dependent Claim 16 words
A solid-state imaging device according to claim 7, wherein said first transistor is a bipolar transistor.
Claim 11
Dependent Claim 16 words
A solid-state imaging device according to claim 7, wherein said first transistor is a field-effect transistor.
Claim 12
Dependent Claim 23 words
A semiconductor device according to claim 7, wherein said signal processing circuit further comprises a differential amplifier which differentially amplifies the detected output.
Claim 13
Dependent Claim 29 words
A solid-state imaging device according to claim 7, wherein the detected output is passed through a low-pass filter and is thereafter amplified by an amplifier into an output signal.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-06-15 1984-12-15 1985-06-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-06-15 1988-12-15 1989-06-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-06-15 1992-12-15 1993-06-16 $7700.00 Window Closed / Lapsed

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