US4268762A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulse forming circuit
Assignee: Trio KK
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Filing: 1979-01-16
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Granted: 1981-05-19
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Expires: 1999-01-16
Abstract
Abstract A trigger pulse forming circuit for converting a pulse signal into a trigger signal waveform is disclosed. It is characterized in that a time constant circuit is comprised in a collector output circuit of one of a pair of transistors for differential amplification and that a clamp circuit which employs a diode of the base-emitter path of a transistor is inserted between collector output circuits of the transistors for differential amplification. The input pulse signal to be subjected to the waveform conversion is impressed across the bases of the transistors for differential amplification, and the trigger pulse output signal is derived from the collector of the other of the transistors for differential amplification.
Inventors
- 👤 Masanori Ienaka
- 👤 Takeshi Wada
- 👤 Yukihiko Miyamoto
- 👤 Tsuneo Yamada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 21:19
CPC Classifications
H; H03; H03K; H03K4/00; H03K6/00
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
172 words
A pulse forming circuit for the wave conversion of a pulse signal, comprising: first and second transistors which have their emitters coupled in common with each other into an arrangement of a differential form, at least one of respective bases of said first and second transistors receiving the pulse signal; load means connected to a collector of said first transistor; a time constant circuit which is connected to a collector of said second transistor; power supply means for feeding to said load means and said time constant circuit; a clamp circuit which clamps a collector potential of said second transistor in a conductive state thereof and which is coupled to said collector of said second transistor; a third transistor which has an emitter connected to said collector of said first transistor, a base connected to said collector of said second transistor and a collector connected to said power supply means; and an output terminal which is connected to said collector of said first transistor and which serves to drive an output signal.
Claim 2
Dependent Claim
172 words
A pulse forming circuit for the wave conversion of a pulse signal, comprising: first and second transistors which have their emitters coupled in common with each other into an arrangement of a differential form, at least one of respective bases of said first and second transistors receiving the pulse signal; load means connected to a collector of said first transistor; a time constant circuit which is connected to a collector of said second transistor; power supply means for feeding to said load means and said time constant circuit; a clamp circuit which clamps a collector potential of said second transistor in a conductive state thereof and which is coupled to said collector of said second transistor; a third transistor which has an emitter connected to said collector of said first transistor, a base connected to said collector of said second transistor and a collector connected to said power supply means; and an output terminal which is connected to said collector of said first transistor and which serves to drive an output signal.
Claim 3
Dependent Claim
37 words
A pulse forming circuit according to claim 1, wherein said power supply means feeds a first predetermined voltage to said load means, and a second predetermined voltage different from the first one to said time constant circuit.
Claim 4
Dependent Claim
22 words
A pulse forming circuit according to claim 2, wherein said second predetermined voltage is a voltage higher than said first predetermined voltage.
Claim 5
Dependent Claim
33 words
A pulse forming circuit according to claim 1, wherein said clamp circuit is made up of a diode which is connected between said collector of said second transistor and said power supply means.
Claim 6
Dependent Claim
158 words
A pulse forming circuit comprising an emitter-coupled differential amplifier which consists of a first transistor to be fed with a voltage from a first power supply and a second transistor to be fed with a voltage different from that of said first power supply from a second power supply and to which an input pulse signal is applied, a load resistor which is connected to an output end of said first transistor, an integration circuit which is connected to an output end of said second transistor, a third transistor whose base and collector are respectively connected to both ends of said integration circuit and whose emitter is connected to said output end of said first transistor, at least one diode whose anode is connected to said first power supply and whose cathode is connected to said output end of said second transistor, and a terminal which derives a pulse output from said output end of said first transistor.
Claim 7
Dependent Claim
158 words
A pulse forming circuit comprising an emitter-coupled differential amplifier which consists of a first transistor to be fed with a voltage from a first power supply and a second transistor to be fed with a voltage different from that of said first power supply from a second power supply and to which an input pulse signal is applied, a load resistor which is connected to an output end of said first transistor, an integration circuit which is connected to an output end of said second transistor, a third transistor whose base and collector are respectively connected to both ends of said integration circuit and whose emitter is connected to said output end of said first transistor, at least one diode whose anode is connected to said first power supply and whose cathode is connected to said output end of said second transistor, and a terminal which derives a pulse output from said output end of said first transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-05-18 | 1984-11-17 | 1985-05-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-05-18 | 1988-11-17 | 1989-05-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-05-18 | 1992-11-17 | 1993-05-19 | $7700.00 | Window Closed / Lapsed |