US4267520A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Hybrid component for very high frequency amplification
Assignee: Thales SA
•
Filing: 1979-05-02
•
Granted: 1981-05-12
•
Expires: 1999-05-02
Abstract
Abstract A component of the "hybrid-circuit" type comprising an active component, such as a very-high-frequency field-effect transistor, and a sealed housing, intended for operating as an amplifier in a large frequency band, in the range from 1 to 20 Gc/s. In this hybrid component, are accomodated in the same housing, by using in particular the ceramic elements of the base situated on the periphery of an earth return aperture containing the active component, metallizations forming lines having distributed constants. Moreover, to obtain a low standing-wave ratio on these lines, lumped circuit elements are placed inside the housing in the closest vicinity of the active component.
Inventors
- 👤 Henri Derewonko
- 👤 Michel Laviron
- 👤 Joel Lepage
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 16:27
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/60; H03F3/601; H01; H01P; H01P3/00; H01P3/02; H01P3/08; H03F3/189; H03F3/19; H03F3/193; H03F3/1935
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
330 words
A hybrid component of the type wherein a field-effect transistor is mounted in a sealed housing and is destined to operate as a high frequency (1-20 Gc/s) amplifier, by insertion between a h.f. supply and a load cooperating with a d.c. supply and means for decoupling the load from said d.c. supply, said hybrid component comprising: a metallic base, said base constituting a ground plane; an insulating plate including a central aperture therein, said plate being mounted onto said metallic base; first and second metallized lines deposited onto said insulating plate, said metallized lines constituting lines with distributed constants, said first metallized line being coupled between said h.f. supply and an input of said hybrid component, said second metallized line being coupled between an output of said hybrid component and said load and said d.c. supply; a bare field-effect transistor chip including a first large face having a source terminal, a gate terminal, and a drain terminal located thereon and a second large face opposite to said first face, said second large face being welded onto said metallic base inside said aperture of said insulating plate; a gate input capacitor coupled between said first metallized line and said gate terminal, said gate input capacitor being formed from a ceramic chip metallized on two of its faces, said ceramic chip being welded onto said first metallized line; a first resistor coupled between said gate terminal and said metallic base, said first resistor being formed from a silicon chip metallized on two of its faces, said first resistor being welded onto said metallic base; a self-biasing cell coupled between said source terminal and said metallic base, said self-biasing cell including a second silicon chip resistor coupled in parallel with a ceramic chip biasing capacitor, said second resistor and said biasing capacitor being welded onto said metallic base; an output conductor coupling said drain terminal to said second metallized line; and an hermetic closure cap covering said central aperture in said insulating plate.
Claim 2
Dependent Claim
330 words
A hybrid component of the type wherein a field-effect transistor is mounted in a sealed housing and is destined to operate as a high frequency (1-20 Gc/s) amplifier, by insertion between a h.f. supply and a load cooperating with a d.c. supply and means for decoupling the load from said d.c. supply, said hybrid component comprising: a metallic base, said base constituting a ground plane; an insulating plate including a central aperture therein, said plate being mounted onto said metallic base; first and second metallized lines deposited onto said insulating plate, said metallized lines constituting lines with distributed constants, said first metallized line being coupled between said h.f. supply and an input of said hybrid component, said second metallized line being coupled between an output of said hybrid component and said load and said d.c. supply; a bare field-effect transistor chip including a first large face having a source terminal, a gate terminal, and a drain terminal located thereon and a second large face opposite to said first face, said second large face being welded onto said metallic base inside said aperture of said insulating plate; a gate input capacitor coupled between said first metallized line and said gate terminal, said gate input capacitor being formed from a ceramic chip metallized on two of its faces, said ceramic chip being welded onto said first metallized line; a first resistor coupled between said gate terminal and said metallic base, said first resistor being formed from a silicon chip metallized on two of its faces, said first resistor being welded onto said metallic base; a self-biasing cell coupled between said source terminal and said metallic base, said self-biasing cell including a second silicon chip resistor coupled in parallel with a ceramic chip biasing capacitor, said second resistor and said biasing capacitor being welded onto said metallic base; an output conductor coupling said drain terminal to said second metallized line; and an hermetic closure cap covering said central aperture in said insulating plate.
Claim 3
Dependent Claim
63 words
A hybrid component as recited in claim 1, wherein: said gate input capacitor has a value of 45 pF; said first resistor has a value of 1000 ohms; said field-effect transistor has a gate width of 1600 microns; said second resistor has a resistance lying in the range of 4 to 5 ohms; and said biasing capacitor has a value of 45 pF.
Claim 4
Dependent Claim
68 words
A hybrid component as recited in claim 1, which further comprises: a first inductor coupled between said drain terminal and said output conductor; a second inductor coupled between said gate terminal and the combination of said gate input capacitor and said first resistor; and a third capacitor coupled in parallel with said first resistor; whereby said second inductor and said third capacitor form a low pass filter element.
Claim 5
Dependent Claim
62 words
A hybrid component as recited in claim 3, wherein: said field-effect transistor has a gate width of 800 microns; said second resistor has a value lying in the range of 8 to 9 ohms; said first inductor has a value of 1 nH; said second inductor has a value of 0.5 nH; and said third capacitor has a value of 0.5 pF.
Claim 6
Dependent Claim
50 words
A hybrid component as recited in claim 1, which further comprises: a first inductor coupled between said drain terminal and said output conductor; and a series circuit coupled between said gate terminal and said metallic base, said series circuit including a second inductor coupled in series with a third capacitor.
Claim 7
Dependent Claim
28 words
A hybrid component as recited in claim 5, wherein: said first inductor has a value of 1 nH; and said second inductor has a value of 0.5 nH.
Claim 8
Dependent Claim
344 words
A hybrid component of the type wherein a field-effect transistor is mounted in a sealed housing and is destined to operate as a high frequency (1-20 Gc/s) amplifier, by insertion between a h.f. supply and a load cooperating with a d.c. supply and means for decoupling the load from said d.c. supply, said hybrid component comprising: a metallic base, said base constituting a ground plane; an insulating plate including a central aperture therein, said plate being mounted onto said metallic base; first and second metallized lines deposited onto said insulating plate, said metallized line constituting lines with distributed constants, said first metallized line being coupled between said h.f. supply and an input of said hybrid component, said second metallized line being coupled between an output of said hybrid component and said load and said d.c. supply; a base field-effect transistor chip including a first large face having a source terminal, a gate terminal, and a drain terminal located thereon, and a second large face opposite to said first face, said second large face being welded onto said metallic base inside said aperture of said insulating plate; a first series inductor having first and second terminals, said first terminal being coupled to said gate terminal; a gate input capacitor coupled between said first metallized line and said second terminal of said first inductor, said gate input capacitor being formed from a ceramic chip metallized on two of its faces, said ceramic chip being welded onto said first metallized line; a leakage inductor coupled between said second terminal of said first inductor and said metallic base; a self-biasing cell coupled between said source terminal and said metallic base, said self-biasing cell including a resistor coupled in parallel with a ceramic chip biasing capacitor, said resistor being formed from a silicon chip metallized on two of its faces, said resistor and said biasing capacitor being welded onto said metallic base; a second series inductor coupled between said drain terminal and said second metallized line; and an hermetic closure cap covering said central aperture in said insulating plate.
Claim 9
Dependent Claim
344 words
A hybrid component of the type wherein a field-effect transistor is mounted in a sealed housing and is destined to operate as a high frequency (1-20 Gc/s) amplifier, by insertion between a h.f. supply and a load cooperating with a d.c. supply and means for decoupling the load from said d.c. supply, said hybrid component comprising: a metallic base, said base constituting a ground plane; an insulating plate including a central aperture therein, said plate being mounted onto said metallic base; first and second metallized lines deposited onto said insulating plate, said metallized line constituting lines with distributed constants, said first metallized line being coupled between said h.f. supply and an input of said hybrid component, said second metallized line being coupled between an output of said hybrid component and said load and said d.c. supply; a base field-effect transistor chip including a first large face having a source terminal, a gate terminal, and a drain terminal located thereon, and a second large face opposite to said first face, said second large face being welded onto said metallic base inside said aperture of said insulating plate; a first series inductor having first and second terminals, said first terminal being coupled to said gate terminal; a gate input capacitor coupled between said first metallized line and said second terminal of said first inductor, said gate input capacitor being formed from a ceramic chip metallized on two of its faces, said ceramic chip being welded onto said first metallized line; a leakage inductor coupled between said second terminal of said first inductor and said metallic base; a self-biasing cell coupled between said source terminal and said metallic base, said self-biasing cell including a resistor coupled in parallel with a ceramic chip biasing capacitor, said resistor being formed from a silicon chip metallized on two of its faces, said resistor and said biasing capacitor being welded onto said metallic base; a second series inductor coupled between said drain terminal and said second metallized line; and an hermetic closure cap covering said central aperture in said insulating plate.
Claim 10
Dependent Claim
65 words
A hybrid component as recited in claim 7, wherein: said first series inductor has a value of 0.5 nH; said gate input capacitor has a value of 45 pF; said leakage inductor has a value of 0.5 nH; said resistor has a value equal to the reciprocal of the transconductance of said field-effect transistor; and said second series inductor has a value of 1 nH.
References Cited (Backward Citations)
GB986672A
Cited
US3384832A
Cited
US3428911A
Cited
US3710272A
Cited
GB1292614A
Cited
GB1336587A
Cited
GB1329002A
Cited
FR2122777A5
Cited
GB1465410A
Cited
DE2424107A1
Cited
US4004256A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-05-11 | 1984-11-10 | 1985-05-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-05-11 | 1988-11-10 | 1989-05-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-05-11 | 1992-11-10 | 1993-05-12 | $7700.00 | Window Closed / Lapsed |