Charge transfer signal processing apparatus filter

Claim 2

In combination, a substrate of semiconductor material having a major surface, a first plurality of first charge storage cells in said substrate adjacent said major surface arranged in a sequence, the width of each successive first charge storage cell being equal to or less than the width of a respective preceding first charge storage cell, each of said first charge storage cells succeeding the first except the last which has a width greater than the width of a succeeding first cell including a first charge storage region and a second charge storage region, the ratio of the width of the first storage region to the sum of the widths of the first and second storage regions of each of said first charge storage cells being set equal to a respective one of a first sequential series of predetermined values, the values assigned to a first cell except for the last not divided into a first and second region being zero, said first plurality of first charge storage cells being serially coupled to form a first plurality of stages of a first charge transfer shift register, each stage including a respective first cell, a first plurality of first collection means, each first collection means coupled to a respective first storage region for collecting charge stored therein, the first collection means of said first plurality except the first collection means coupled to the last of said first cells being connected in common, means for providing a first sequence of packets of charge, means for introducing serially to the initial first cell of said first shift register each of said first packets of charge and thereafter periodically and serially transferring each of said packets of charge from first cell to first cell including the transfer of portions of said packets of charge from each of said first storage regions to a respective collection means, a second plurality of first charge storage cells in said substrate adjacent said major surface arranged in a sequence, the width of each successive first charge storage cell being equal to or less than the width of a respective preceding first charge storage cell, each of said first charge storage cells of said second plurality succeeding the first charge storage cell which has a width greater than the width of a succeeding first cell including a first charge storage region and a second charge storage region, the ratio of the width of the first storage region to the sum of the widths of the first and second storage regions of each of said first charge storage cells of said second plurality being set equal to a respective one of a second sequential series of predetermined values, the values assigned to a cell except for the last not divided into a first and second region being zero, corresponding values of said first and second sequential series being equal, said second plurality of first charge storage cells being serially coupled to form a second plurality of stages of a second charge transfer shift register, each stage including a respective first cell, a second plurality of first collection means, each first collection means coupled to a respective first storage region for collecting charge stored therein, the first collection means of said second plurality except the first collection means coupled to the last of the first cells of said second plurality being connected in common, means for providing a second sequence of packets of charge, means for serially introducing to the initial cell of said second shift register each of said packets of charge of said second sequence and thereafter periodically and serially transferring each of said packets of charge from first cell to first cell including the transfer of portions of said packets of charge from each of said first storage regions to a respective first collection means, means for transferring the charge collected by the first collection means coupled to the last of said first cells of said first plurality to the initial one of said first cells of said second plurality, means for transferring the charge collected by the first collection means coupled to the last of said first cells of said second plurality to the initial one of said first cells of said first plurality, means for deriving signal samples each of which represents the difference of the charge collected by said first collection means of said first plurality connected in common and collected by said first collection means of said second plurality connected in common.

Claim 3

Charge transfer apparatus comprising a first plurality of first charge storage cells arranged in sequence, means dividing each of said first charge storage cells except the last into parts in a manner so that the ratio of charge contained within a first part of each of said first charge storage cells to the sum of the charges contained within all of the parts thereof is equal to a respective one of a first sequential series of predetermined values, said first sequential series of predetermined values corresponding to a sequential series weighting coefficients, each for a respective first charge storage cell, the last of said first charge storage cells of said first plurality being constituted so that the ratio of the charge contained therein to the charge contained within the first of said charge storage cells of said first plurality is equal to a first predetermined fraction, said first plurality of first charge storage cells being serially coupled to form a first plurality of stages of a first charge transfer shift register, each stage including a respective first charge storage cell, a first plurality of collection means, each collection means coupled to a first part of a respective first charge storage cell for collecting charge stored therein, the first collection means of said first plurality except the first collection means coupled to the last of said first cells being connected in common, means for providing a first input sequence of packets of charge, each packet representing a respective sample of a first signal, means for introducing sequentially into the initial cell of said first shift register each of said first packets of charge of said first sequence and thereafter periodically and serially transferring and dividing each of said packets of charge from first charge storage cell to first charge storage cell including the transfer of portions of said packets of charge from each of said first parts to a respective collection means, a second plurality of first charge storage cells arranged in a sequence, means dividing each of said first charge storage cells except the last into parts in a manner so that the ratio of charge contained within a first part of each of said first charge storage cells to the sum of the charges contained within all of the parts thereof is equal to a respective one of a second sequential series of predetermined values, said second sequential series of predetermined values corresponding to a sequential series of weighting coefficients, each for a respective first charge storage cell, the last of said first charge storage cells of said second plurality being constituted so that the ratio of charge contained within the last of said first charge storage cells of said second plurality to the charge contained within the first of said charge storage cells of said second plurality is equal to said first predetermined fraction, said second series of weighting coefficients being identical to said first series of weighting coefficients, said second plurality of first charge storage cells being serially coupled to form a second plurality of stages of a second charge transfer shift register, each stage including a respective first charge storage cell, a second plurality of collection means, each collection meaans coupled to a first part of a respective first charge storage cell for collecting charge stored therein, the first collection means of said first plurality except the first collection means coupled to the last of said first cells being connected in common, means for providing a second input sequence of packets of charge, each packet representing a respective sample of a second signal, means for introducing sequentially into the initial cell of said second shift register each of said first packets of charge of said second sequence and thereafter periodically and serially transferring and dividing each of said packets of charge from first charge storage cell to first charge storage cell including the transfer of portions of said packets of charge from each of said first parts to a respective collection means, means for transferring the charge collected by the first collection means coupled to the last of said first cells of said first plurality to the initial one of said first cells of said second plurality, means for transferring the charge collected by the first collection means coupled to the last of said first cells of said second plurality to the initial one of said first cells of said first plurality, means for deriving signal samples each of which represents the difference of the charge collected by said first collection means of said first plurality connected in common and collected by first collection means of said second plurality connected in common.

Claim 4

Charge transfer apparatus comprising a first plurality of first charge storage cells arranged in sequence, means dividing each of said first charge storage cells except the last into parts in a manner so that the ratio of charge contained within a first part of each of said first charge storage cells to the sum of the charges contained within all of the parts thereof is equal to a respective one of a first sequential series of predetermined values, said first sequential series of predetermined values corresponding to a sequential series weighting coefficients, each for a respective first charge storage cell, the last of said first charge storage cells of said first plurality being constituted so that the ratio of the charge contained therein to the charge contained within the first of said charge storage cells of said first plurality is equal to a first predetermined fraction, said first plurality of first charge storage cells being serially coupled to form a first plurality of stages of a first charge transfer shift register, each stage including a respective first charge storage cell, a first plurality of collection means, each collection means coupled to a first part of a respective first charge storage cell for collecting charge stored therein, the first collection means of said first plurality except the first collection means coupled to the last of said first cells being connected in common, means for providing a first input sequence of packets of charge, each packet representing a respective sample of a first signal, means for introducing sequentially into the initial cell of said first shift register each of said first packets of charge of said first sequence and thereafter periodically and serially transferring and dividing each of said packets of charge from first charge storage cell to first charge storage cell including the transfer of portions of said packets of charge from each of said first parts to a respective collection means, a second plurality of first charge storage cells arranged in a sequence, means dividing each of said first charge storage cells except the last into parts in a manner so that the ratio of charge contained within a first part of each of said first charge storage cells to the sum of the charges contained within all of the parts thereof is equal to a respective one of a second sequential series of predetermined values, said second sequential series of predetermined values corresponding to a sequential series of weighting coefficients, each for a respective first charge storage cell, the last of said first charge storage cells of said second plurality being constituted so that the ratio of charge contained within the last of said first charge storage cells of said second plurality to the charge contained within the first of said charge storage cells of said second plurality is equal to said first predetermined fraction, said second series of weighting coefficients being identical to said first series of weighting coefficients, said second plurality of first charge storage cells being serially coupled to form a second plurality of stages of a second charge transfer shift register, each stage including a respective first charge storage cell, a second plurality of collection means, each collection meaans coupled to a first part of a respective first charge storage cell for collecting charge stored therein, the first collection means of said first plurality except the first collection means coupled to the last of said first cells being connected in common, means for providing a second input sequence of packets of charge, each packet representing a respective sample of a second signal, means for introducing sequentially into the initial cell of said second shift register each of said first packets of charge of said second sequence and thereafter periodically and serially transferring and dividing each of said packets of charge from first charge storage cell to first charge storage cell including the transfer of portions of said packets of charge from each of said first parts to a respective collection means, means for transferring the charge collected by the first collection means coupled to the last of said first cells of said first plurality to the initial one of said first cells of said second plurality, means for transferring the charge collected by the first collection means coupled to the last of said first cells of said second plurality to the initial one of said first cells of said first plurality, means for deriving signal samples each of which represents the difference of the charge collected by said first collection means of said first plurality connected in common and collected by first collection means of said second plurality connected in common.

Claim 5

The apparatus of claim 2 in which said plurality of first charge storage cells are formed in a substrate of semiconductor material.

Claim 6

The apparatus of claim 3 in which said plurality of first charge storage cells are formed adjacent a major surface of said substrate of semiconductor material.