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US4251769A Expired / Lapsed US ⏱️ 0.0 years remaining

Indicator and limit value alarm device

Assignee: Dr Eduard Fresenius Chemisch Pharmazeutische Industrie KG Apparatebau KG
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Filing: 1979-04-05
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Granted: 1981-02-17
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Expires: 1999-04-05
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Abstract

Abstract The present electronic indicator or display device is equipped with adjustable upper and/or lower limit value markers to provide a respective alarm if such limit values are exceeded or not reached. The display itself comprises an electronic circuit and optical display elements such as light emitting diodes connected to the display circuit. An input to the display circuit is adapted to receive rated or limit value input signals which are displayed as respective markers and the position of which is adjustable. A time multiplexing circuit controls the timed sequence of the signals supplied to the display elements. A comparator compares the measured signal value with the rated value or values and monitors the proper function of the system.

Inventors

  • 👤 Horst Ewert
  • 👤 Wilfried Schael

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 15:45
CPC Classifications
G; G01; G01D; G01D3/00; G01D3/08; G01D7/00; G01D7/02; G01D7/08; G01R; G01R13/00; G01R13/40; G01R13/404; G01R13/405; G01R13/406

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 176 words
An indicator and limit value alarm circuit arrangement, comprising analog multiplexing means (103) including input means (105, 106; 111, 112, 113) for supplying input values including measured value representing signals, rated value representing signals, and limit value representing signals to said analog multiplexing means (103), clock generator means (104) operatively connected to said analog multiplexing means (103) for sequentially processing said signals through said analog multiplexing means, said clock generator means providing a clock signal having a clock frequency above the resolution of the human eye, display means (101) comprising a plurality of display elements arranged in a row, analog-to-digital converter means (101) operatively interconnecting said display means to said analog multiplexing means whereby any one of said display elements may be energized sequentially, said clock frequency assuring a simultaneous display to the observer, said clock generator means controlling said analog multiplexing means in such a manner that the switched-on durations differ for different input values for distinguishing said different input values on said display means by the different brightnesses resulting from said different switched-on durations.
Claim 2
Dependent Claim 176 words
An indicator and limit value alarm circuit arrangement, comprising analog multiplexing means (103) including input means (105, 106; 111, 112, 113) for supplying input values including measured value representing signals, rated value representing signals, and limit value representing signals to said analog multiplexing means (103), clock generator means (104) operatively connected to said analog multiplexing means (103) for sequentially processing said signals through said analog multiplexing means, said clock generator means providing a clock signal having a clock frequency above the resolution of the human eye, display means (101) comprising a plurality of display elements arranged in a row, analog-to-digital converter means (101) operatively interconnecting said display means to said analog multiplexing means whereby any one of said display elements may be energized sequentially, said clock frequency assuring a simultaneous display to the observer, said clock generator means controlling said analog multiplexing means in such a manner that the switched-on durations differ for different input values for distinguishing said different input values on said display means by the different brightnesses resulting from said different switched-on durations.
Claim 3
Dependent Claim 31 words
The circuit arrangement of claim 1, further comprising alarm means operatively connected to said analog multiplexing means (103) and to said measured value input means (113) for providing an alarm signal.
Claim 4
Dependent Claim 77 words
The circuit arrangement of claim 2, further comprising comparator circuit means (107) connected to said alarm means, said comparator circuit means (107) having a first input for receiving said measured value representing signals from the respective input means and a second input for receiving said limit value representing signals from said analog multiplexing means, whereby the functioning of the clock generator means (104), of the analog multiplexing means and of the comparator circuit means is continuously monitored.
Claim 5
Dependent Claim 29 words
The circuit arrangement of claim 3, wherein said comparator circuit means provides an alarm output signal when a measured value representing signal exceeds or falls below said limit value.
Claim 6
Dependent Claim 50 words
The circuit arrangement of claim 3, wherein said alarm means comprise alarm signal circuit means operatively connected to said comparator circuit means and alarm display means operatively connected to said alarm signal circuit means for providing an alarm in response to a specific output signal from said comparator circuit means.
Claim 7
Dependent Claim 27 words
The circuit arrangement of claim 2, wherein said alarm means comprise alarm signal producing means and signal memory means operatively connected to said alarm signal producing means.
Claim 8
Dependent Claim 33 words
The circuit arrangement of claim 2, wherein said alarm means comprise flashing signal circuit means operatively connected to said display means for controlling the energizing of at least one of said display elements.
Claim 9
Dependent Claim 53 words
The circuit arrangement of claim 2, wherein said display means comprise at least one alarm signal element, and wherein said alarm means comprise alarm signal generator means operatively connected to said alarm signal element for controlling said alarm signal element in response to the measured value falling below or exceeding said limit value.
Claim 10
Dependent Claim 23 words
The circuit arrangement of claim 1, wherein said input means for said limit value representing signals comprise means for adjusting said limit value.
Claim 11
Dependent Claim 28 words
The circuit arrangement of claim 1, wherein said display means comprise a plurality of light emitting diodes arranged in a row or column to form a display unit.
Claim 12
Dependent Claim 19 words
The circuit arrangement of claim 1, wherein said display means comprise additional optical display elements for signifying special conditions.

References Cited (Backward Citations)

US2593204A Cited
US2705902A Cited
US3914758A Cited
US3922640A Cited
US4001699A Cited
US4200896A Cited
US4155084A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-02-17 1984-08-18 1985-02-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-02-17 1988-08-18 1989-02-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-02-17 1992-08-18 1993-02-17 $7700.00 Window Closed / Lapsed

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