US4251767A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dual channel capacitance measurement device
Assignee: Individual
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Filing: 1978-08-25
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Granted: 1981-02-17
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Expires: 1998-08-25
Abstract
Abstract The capacitance of an unknown capacitor is determined by counting the cycles of a known frequency contained within a time gate whose time duration is determined by subtracting a gate whose length is equivalent to the stray measuring capacitance from a gate whose length is determined by the capacitance of the unknown capacitor plus the unavoidable stray measuring capacitances.
Inventors
- 👤 Donald M. Montana
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 00:58
CPC Classifications
G; G01; G01R; G01R27/00; G01R27/02; G01R27/26; G01R27/2605
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
174 words
A dual channel capacitance measurement device providing a display of the capacitance of the device under test without the inclusion of stray capacitances, comprising: a. means for generating a train of clock pulses of known frequency; b. means for generating a first time interval gate proportional to the capacitance of the device under test including stray capacitances; c. means for generating a second time interval gate proportional to the said stray capacitances; d. means for synchronizing the said first time gate means and the said second time gate by the said train of clock pulses; e. means for subtracting the said second time interval gate from the said first time interval gate and providing a third time interval gate proportional to the capacitance of the device under test; f. means cooperating with the said third time interval gate and the said train of clock pulses for gating a number of said clock pulses responsive to the said third time interval; and g. means for counting and displaying the said number of gated clock pulses.
Claim 2
Dependent Claim
174 words
A dual channel capacitance measurement device providing a display of the capacitance of the device under test without the inclusion of stray capacitances, comprising: a. means for generating a train of clock pulses of known frequency; b. means for generating a first time interval gate proportional to the capacitance of the device under test including stray capacitances; c. means for generating a second time interval gate proportional to the said stray capacitances; d. means for synchronizing the said first time gate means and the said second time gate by the said train of clock pulses; e. means for subtracting the said second time interval gate from the said first time interval gate and providing a third time interval gate proportional to the capacitance of the device under test; f. means cooperating with the said third time interval gate and the said train of clock pulses for gating a number of said clock pulses responsive to the said third time interval; and g. means for counting and displaying the said number of gated clock pulses.
References Cited (Backward Citations)
US4065715A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-02-17 | 1984-08-18 | 1985-02-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-02-17 | 1988-08-18 | 1989-02-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-02-17 | 1992-08-18 | 1993-02-17 | $7700.00 | Window Closed / Lapsed |