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US4249239A
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High-speed coupler for transmission lines or computer peripherals which employs a special microinstruction structure
Assignee: Compagnie Internationale pour l'Informatique CII-Honeywell Bull SA
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Filing: 1978-11-16
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Granted: 1981-02-03
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Expires: 1998-11-16
Abstract
Abstract An architecture for a special purpose microprocessor particularly adapted for coupling a computer to its associated peripheral devices or to transmission lines. To minimize restrictions on the speed of data exchange, the present microprocessor allows the following to take place simultaneously: (1) general coupling of the computer and associated transmission lines and, more particularly, execution of instructions for coupling, shifting, or indirect conditional branching; and (2) the performance of arithmetic and/or logic operations on data which is exchanged between the computer and the associated transmission or peripheral lines. The present microprocessor executes microinstructions which are stored in a control memory. The format of the microinstructions is such that information in various zones controls the functions to be simultaneously performed.
Inventors
- 👤 Jean-Francois Mescam
- 👤 Thomas Balla
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 04:20
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/22; G06F9/226; G06F13/00; G06F13/10; G06F13/12; G06F13/124
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
159 words
A microprocessor comprising: processing means for performing arithmetic logic operations on data; a control memory in which microinstructions are stored; means for addressing said control memory; means for permitting the simultaneous coupling of external data receiving and data transmitting means and the execution by said processing means of arithmetic logic operations on data exchanged between the external data receiving and transmitting means, said means for permitting simultaneous coupling and execution of data including means for decoding microinstructions read from said control memory; and the stored microinstructions including: a zone indicating the source of an operand to be supplied as data to said processing means, a zone indicating the particular arithmetic and/or logic operation to be performed by said processing means, a zone indicating the destination of the result of the arithmetic and/or logic operation which is performed, a zone indicating a coupling function, and a zone indicating the source of the next control memory address of a microinstruction sequence.
Claim 2
Dependent Claim
159 words
A microprocessor comprising: processing means for performing arithmetic logic operations on data; a control memory in which microinstructions are stored; means for addressing said control memory; means for permitting the simultaneous coupling of external data receiving and data transmitting means and the execution by said processing means of arithmetic logic operations on data exchanged between the external data receiving and transmitting means, said means for permitting simultaneous coupling and execution of data including means for decoding microinstructions read from said control memory; and the stored microinstructions including: a zone indicating the source of an operand to be supplied as data to said processing means, a zone indicating the particular arithmetic and/or logic operation to be performed by said processing means, a zone indicating the destination of the result of the arithmetic and/or logic operation which is performed, a zone indicating a coupling function, and a zone indicating the source of the next control memory address of a microinstruction sequence.
Claim 3
Dependent Claim
43 words
A microprocessor according to claim 1, wherein: said processing means includes working registers; and wherein the stored microinstructions further include: a zone for indicating particular working registers in said processing means to be used, and a zone for validating the indicated coupling function.
Claim 4
Dependent Claim
65 words
A microprocessor according to claim 1, which further comprises: means responsive to a zone read from said control memory indicating a coupling function for selecting either signals from means external to said microprocessor or signals from the output of said processing means; and means for controlling said means for addressing said control memory, said means for controlling receiving the output of said means for selecting.
Claim 5
Dependent Claim
65 words
A microprocessor according to claim 2, which further comprises: means responsive to a zone read from said control memory indicating a coupling function for selecting either signals from means external to said microprocessor or signals from the output of said processing means; and means for controlling said means for addressing said control memory, said means for controlling receiving the output of said means for selecting.
Claim 6
Dependent Claim
39 words
A microprocessor according to claim 3, wherein said means for selecting comprises: at least one multiplexer responsive to the zone of a microinstruction read from said control memory indicating a coupling function; and means for storing the selected signal.
Claim 7
Dependent Claim
39 words
A microprocessor according to claim 4, wherein said means for selecting comprises: at least one multiplexer responsive to the zone of a microinstruction read from said control memory indicating a coupling function; and means for storing the selected signal.
Claim 8
Dependent Claim
51 words
A microprocessor according to claim 6, wherein orders from the zone indicating a coupling function to at least one multiplexer in said selecting means are validated by a means responsive to a particular state of the zone of a microinstruction read from said control memory for validating the indicated coupling function.
Claim 9
Dependent Claim
67 words
A microprocessor according to claim 5, wherein said means for controlling said means for addressing comprises a programmable memory which is addressed by: the zone of a microinstruction read from said control memory indicating the source of the next control memory address; said means for storing the selected signal; a suspension request from an external device; and a carry bit which is output by said processing means.
Claim 10
Dependent Claim
67 words
A microprocessor according to claim 6, wherein said means for controlling said means for addressing comprises a programmable memory which is addressed by: the zone of a microinstruction read from said control memory indicating the source of the next control memory address; said means for storing the selected signal; a suspension request from an external device; and a carry bit which is output by said processing means.
Claim 11
Dependent Claim
28 words
A microprocessor according to claim 5, wherein said means for controlling said means for addressing said control memory has outputs connected to inputs of said means for addressing.
Claim 12
Dependent Claim
28 words
A microprocessor according to claim 6, wherein said means for controlling said means for addressing said control memory has outputs connected to inputs of said means for addressing.
Claim 13
Dependent Claim
170 words
A coupler for providing coupling between a computer and associated peripheral units, said coupler comprising: processing means for performing arithmetic logic operations on data transmitted to the peripheral units; a control memory in which microinstructions defining operations to be performed by said processing means are stored; and means for decoding microinstructions read from said control memory, which microinstructions act on said processing means and on said control memory, said decoding means including: means for selecting the source of an operand to be supplied as data to said processing means, means for causing a particular arithmetic and/or logic operation to be performed by said processing means, means for directing to a particular destination the result of the arithmetic and/or logic operation which is performed, means selecting particular working registers of said processing means to be employed in executing a microinstruction, means for causing a particular coupling function to be employed in executing a microinstruction, means for validating the indicated coupling function, and means for addressing microinstructions of a microprogram in sequence.
Claim 14
Dependent Claim
170 words
A coupler for providing coupling between a computer and associated peripheral units, said coupler comprising: processing means for performing arithmetic logic operations on data transmitted to the peripheral units; a control memory in which microinstructions defining operations to be performed by said processing means are stored; and means for decoding microinstructions read from said control memory, which microinstructions act on said processing means and on said control memory, said decoding means including: means for selecting the source of an operand to be supplied as data to said processing means, means for causing a particular arithmetic and/or logic operation to be performed by said processing means, means for directing to a particular destination the result of the arithmetic and/or logic operation which is performed, means selecting particular working registers of said processing means to be employed in executing a microinstruction, means for causing a particular coupling function to be employed in executing a microinstruction, means for validating the indicated coupling function, and means for addressing microinstructions of a microprogram in sequence.
Claim 15
Dependent Claim
32 words
A coupler according to claim 12, further comprising means for inhibiting the output of said processing means when arithmetic logic operations are not to be performed on data transmitted through said coupler.
References Cited (Backward Citations)
US3833888A
Cited
US3969724A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-02-03 | 1984-08-04 | 1985-02-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-02-03 | 1988-08-04 | 1989-02-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-02-03 | 1992-08-04 | 1993-02-03 | $7700.00 | Window Closed / Lapsed |