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US4249186A Expired / Lapsed US ⏱️ 0.0 years remaining

Processor system for display and/or recording of information

Assignee: Leeds and Northrup Co
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Filing: 1978-08-18
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Granted: 1981-02-03
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Expires: 1998-08-18
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Abstract

Abstract A multipoint display or recorder system is based upon a digital processor which controls the sampling of data points and the storage of digital values to be displayed or recorded. A digital display device or recorder (e.g. a colummn of LED's or a dot--printing thermal recorder) is controlled by the stored digital values. The processor is capable of determining independent rates for sampling the data points, refreshing the display and effecting read out to the recorder, each rate being matched to the characteristics of the corresponding peripheral (multiplexing sampler and ADC, display device and recorder). The digital processor enables other functions to be performed, e.g. display of alarm levels for the sampled variables and automatic control of the process giving rise to the variables.

Inventors

  • 👤 Roger D. Edwards

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 17:13
CPC Classifications
G; G05; G05B; G05B23/00; G05B23/02; G05B23/0205; G05B23/0259; G05B23/0267; G05B23/0272

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 171 words
A digital processor system for providing a display representing a plurality of varying signals, said system comprising a clock source producing regular electrical signals, a control means coordinating a number of time-shared operations synchronized by signals derived from the clock signals, input circuitry for feeding the varying signals sequentially to the processor system in a first of the said operations and at a first rate determined by the control means, means for deriving digital signals representing the varying signals in a second of the said operations, means for processing the digital signals and placing them in a store in a third of the said operations, display means for providing a visual bar graph display with one bar for each varying signal, the display means comprising a plurality of display elements for each bar, and means for obtaining values from the store in a fourth of the said operations and transferring them to the display means at a second rate determined by the control means to control actuation of the display elements.
Claim 2
Dependent Claim 171 words
A digital processor system for providing a display representing a plurality of varying signals, said system comprising a clock source producing regular electrical signals, a control means coordinating a number of time-shared operations synchronized by signals derived from the clock signals, input circuitry for feeding the varying signals sequentially to the processor system in a first of the said operations and at a first rate determined by the control means, means for deriving digital signals representing the varying signals in a second of the said operations, means for processing the digital signals and placing them in a store in a third of the said operations, display means for providing a visual bar graph display with one bar for each varying signal, the display means comprising a plurality of display elements for each bar, and means for obtaining values from the store in a fourth of the said operations and transferring them to the display means at a second rate determined by the control means to control actuation of the display elements.
Claim 3
Dependent Claim 208 words
A digital processor system for providing a display and a visual record representing a plurality of varying signals, said system comprising a clock source producing regular electrical signals, a control means coordinating a number of time-shared operations synchronized by signals derived from the clock signals, input circuitry for feeding the varying signals sequentially to the processor system in a first of the said operations and at a first rate determined by the control means, means for deriving digital signals representing the varying signals in a second of the said operations, means for processing the digital signals and placing them in a store in a third of the said operations, a recording device and display means for providing a visual record and a visual display respectively, means for obtaining values from the store in a fourth of the said operations and transferring them to the recording means at a second rate determined by the control means in a form such that the recording means produce the said visual record and transferring them to the display means at a third rate which is different from the second rate and is determined by the control means in a form such that the display means produce a display representing the varying signals.
Claim 4
Dependent Claim 208 words
A digital processor system for providing a display and a visual record representing a plurality of varying signals, said system comprising a clock source producing regular electrical signals, a control means coordinating a number of time-shared operations synchronized by signals derived from the clock signals, input circuitry for feeding the varying signals sequentially to the processor system in a first of the said operations and at a first rate determined by the control means, means for deriving digital signals representing the varying signals in a second of the said operations, means for processing the digital signals and placing them in a store in a third of the said operations, a recording device and display means for providing a visual record and a visual display respectively, means for obtaining values from the store in a fourth of the said operations and transferring them to the recording means at a second rate determined by the control means in a form such that the recording means produce the said visual record and transferring them to the display means at a third rate which is different from the second rate and is determined by the control means in a form such that the display means produce a display representing the varying signals.

References Cited (Backward Citations)

GB907840A Cited
GB991791A Cited
GB1057892A Cited
GB1358586A Cited
GB1436639A Cited
GB1434050A Cited
US3971041A Cited
US4131900A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-02-03 1984-08-04 1985-02-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-02-03 1988-08-04 1989-02-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-02-03 1992-08-04 1993-02-03 $7700.00 Window Closed / Lapsed

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