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US4244017A Expired / Lapsed US ⏱️ 0.0 years remaining

Third harmonic auxiliary commutated inverter having selectable commutation capacitance as a function of load current

Assignee: General Electric Co
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Filing: 1979-08-30
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Granted: 1981-01-06
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Expires: 1999-08-30
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Abstract

Abstract Three pairs of series-connected inverter main thyristors are coupled in parallel across a unidirectional current source with the junction between thyristors of each pair being adapted for coupling to a respective phase of a three phase wye-connected inductive load. A first and second pair of serially-connected auxiliary thyristors are coupled in parallel across the current source, with the junction between thyristors of the first and second auxiliary pairs coupled by a first and second commutating capacitance, respectively, to the load neutral. Control means, responsive to conduction of a main thyristor, render a respective one of the thyristors of the first and second auxiliary thyristor pairs conductive in accordance with inverter load current to commutate a conductive main thyristor by coupling a respective one of the first and second commutating capacitances in series with a respective load phase across the conductive main thyristor. Inverter commutation capacitance is thus varied in accordance with load current, thereby extending inverter operating range and reducing likelihood of inverter commutation failure.

Inventors

  • 👤 Robert L. Steigerwald

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 21:57
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/505; H02M7/515; H02M7/5152

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 376 words
An improved current fed inverter having selectable commutation capacitance as a function of load current for supplying alternating current to a wye-connected, polyphase, inductive load from a source of unidirectional current comprising: a plurality of pairs of main solid state switching devices corresponding in number to the number of phases of said inductive load, the solid state switching devices in each pair of main solid state switching devices being coupled in series aiding fashion, each pair being coupled across said source of unidirectional current and having the junction therebetween coupled to a respective phase of said inductive load; a first pair of auxiliary solid state switching devices coupled in series aiding fashion across said source of unidirectional current; a first commutation capacitance coupled between the junction of solid state switching devices of said first pair of auxiliary solid state switching devices and the neutral of said wye-connected inductive load; a second pair of inverter auxiliary solid state switching devices coupled in series aiding fashion across said source of unidirectional current; a second commutation capacitance coupled between the junction of solid state switching devices of said second pair of auxiliary solid state switching devices and the neutral of said wye-connected inductive load; first control means coupled to the solid state switching devices of said pairs of main solid state switching devices and rendering the solid state switching devices of said pairs of main solid state switching devices conductive in a predetermined sequence to supply said polyphase inductive load with alternating current; and second control means coupled to the solid state switching devices of said first and said second pair of auxiliary solid state switching devices, said second control means rendering conductive, responsive to the conduction of a respective one of said main solid state switching devices, one of the solid state switching devices of said first pair of auxiliary solid state switching devices and one of the switching devices of said one of said second pair of auxiliary solid state switching devices in accordance with inverter current to couple said first and said second commutation capacitances, respectively, in series with a respective load phase across said respective one of said main solid state switching devices to commutate said respective one of said main solid state switching devices.
Claim 2
Dependent Claim 376 words
An improved current fed inverter having selectable commutation capacitance as a function of load current for supplying alternating current to a wye-connected, polyphase, inductive load from a source of unidirectional current comprising: a plurality of pairs of main solid state switching devices corresponding in number to the number of phases of said inductive load, the solid state switching devices in each pair of main solid state switching devices being coupled in series aiding fashion, each pair being coupled across said source of unidirectional current and having the junction therebetween coupled to a respective phase of said inductive load; a first pair of auxiliary solid state switching devices coupled in series aiding fashion across said source of unidirectional current; a first commutation capacitance coupled between the junction of solid state switching devices of said first pair of auxiliary solid state switching devices and the neutral of said wye-connected inductive load; a second pair of inverter auxiliary solid state switching devices coupled in series aiding fashion across said source of unidirectional current; a second commutation capacitance coupled between the junction of solid state switching devices of said second pair of auxiliary solid state switching devices and the neutral of said wye-connected inductive load; first control means coupled to the solid state switching devices of said pairs of main solid state switching devices and rendering the solid state switching devices of said pairs of main solid state switching devices conductive in a predetermined sequence to supply said polyphase inductive load with alternating current; and second control means coupled to the solid state switching devices of said first and said second pair of auxiliary solid state switching devices, said second control means rendering conductive, responsive to the conduction of a respective one of said main solid state switching devices, one of the solid state switching devices of said first pair of auxiliary solid state switching devices and one of the switching devices of said one of said second pair of auxiliary solid state switching devices in accordance with inverter current to couple said first and said second commutation capacitances, respectively, in series with a respective load phase across said respective one of said main solid state switching devices to commutate said respective one of said main solid state switching devices.
Claim 3
Dependent Claim 21 words
The invention according to claim 1 wherein said first commutation capactiance is of a lesser magnitude than said second commutation capacitance.
Claim 4
Dependent Claim 171 words
The invention according to claim 1 wherein said first control means comprises a main gate controller circuit coupled to the solid state switching devices of said pairs of main solid state switching devices for supplying gating signals thereto to render the solid state switching devices of said pairs of main solid state switching devices conductive in said predetermined seauence and said second control means comprises: an auxiliary gate controller circuit coupled to said main gate controller circuit and to the solid state switching devices of said first and said second pair of auxiliary solid state switching devices, said auxiliary gate controller circuit supplying, in response to auxiliary gating signals generated by said main gate controller circuit, gating signals to each of the solid state switching devices of said first and said second pairs of auxiliary solid state switching devices to render one of the solid state switching devices conductive in each of said first and said second pairs of auxiliary solid state switching devices conductive in accordance with inverter link current.
Claim 5
Dependent Claim 110 words
The invention according to claim 3 wherein said auxiliary gate controller circuit comprises: first comparator means for providing a logic output voltage which varies in accordance with the magnitude deviation of inverter link current from a first preset inverter link current; second comparator means for providing a logic output voltage which varies in accordance with the magnitude deviation of inverter link current from a second preset inverter link current; and logic means coupled to said main gate controller circuit and to said first and said second comparator means for supplying gating signals to the solid state switching devices of said first and second pairs of auxiliary solid state switching devices.
Claim 6
Dependent Claim 339 words
For use with a third harmonic auxiliary commutated inverter configured of a plurality of pairs of main solid state switching devices, each of the solid state switching devices of said pairs being coupled in series aiding fashion, each pair being coupled across a source of unidirectional current and having the junction therebetween coupled to a respective phase of a wye-connected, polyphase, inductive load, each of the solid state switching devices of said pairs being rendered conductive by a main solid state switching device gate controller circuit in a predetermined sequence to supply alternating current to said wye-connected, polyphase, inductive load, main gate controller circuit generating auxiliary gating signals to command commutation of a then conductive inverter main solid state switching device comprising: a first pair of auxiliary solid state switching devices coupled in series-aiding fashion across said source of unidirectional current; a first commutating capacitance coupled to the junction between solid state switching devices of said first pair of auxiliary solid state switching devices and adapted for coupling to the neutral of said wye-connected, polyphase, inductive load; a second pair of auxiliary solid state switching devices coupled in series aiding fashion across said source of unidirectional current; a second communicating capacitance coupled to the junction between switching devices of said second pair of auxiliary solid state switching devices and adapted for coupling to the neutral of said wye-connected, polyphase, inductive load; and an auxiliary gate controller circuit coupled to said main gate controller circuit and to each of the solid state switching devices of said first and said second pair of auxiliary solid state switching devices for rendering conductive, responsive to conduction of one of the solid state switching devices of said pairs of inverter main solid state switching devices, one of the solid state switching devices in each of said first and said second pairs of auxiliary solid state switching devices in accordance with inverter current to commutate a then conductive one of the solid state switching devices of said pairs of inverter main solid state switching devices.
Claim 7
Dependent Claim 339 words
For use with a third harmonic auxiliary commutated inverter configured of a plurality of pairs of main solid state switching devices, each of the solid state switching devices of said pairs being coupled in series aiding fashion, each pair being coupled across a source of unidirectional current and having the junction therebetween coupled to a respective phase of a wye-connected, polyphase, inductive load, each of the solid state switching devices of said pairs being rendered conductive by a main solid state switching device gate controller circuit in a predetermined sequence to supply alternating current to said wye-connected, polyphase, inductive load, main gate controller circuit generating auxiliary gating signals to command commutation of a then conductive inverter main solid state switching device comprising: a first pair of auxiliary solid state switching devices coupled in series-aiding fashion across said source of unidirectional current; a first commutating capacitance coupled to the junction between solid state switching devices of said first pair of auxiliary solid state switching devices and adapted for coupling to the neutral of said wye-connected, polyphase, inductive load; a second pair of auxiliary solid state switching devices coupled in series aiding fashion across said source of unidirectional current; a second communicating capacitance coupled to the junction between switching devices of said second pair of auxiliary solid state switching devices and adapted for coupling to the neutral of said wye-connected, polyphase, inductive load; and an auxiliary gate controller circuit coupled to said main gate controller circuit and to each of the solid state switching devices of said first and said second pair of auxiliary solid state switching devices for rendering conductive, responsive to conduction of one of the solid state switching devices of said pairs of inverter main solid state switching devices, one of the solid state switching devices in each of said first and said second pairs of auxiliary solid state switching devices in accordance with inverter current to commutate a then conductive one of the solid state switching devices of said pairs of inverter main solid state switching devices.
Claim 8
Dependent Claim 112 words
The invention according to claim 5 wherein said auxiliary gate controller circuit comprises: first comparator means for providing a logic output voltage which varies in accordance with magnitude deviation of inverter link current from a first preset inverter link current; second comparator means for providing a logic output voltage which varies in accordance with magnitude deviation of inverter link current from a second preset inverter link current; and logic means coupled to said main solid state switching device gate controller circuit and to said first and said second comparator means for supplying gating signals to the solid state switching devices of said first and second pairs of auxiliary solid state switching devices.

References Cited (Backward Citations)

SU307472A1 Cited
US4191994A Cited
US4180853A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-01-06 1984-07-07 1985-01-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-01-06 1988-07-07 1989-01-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-01-06 1992-07-07 1993-01-06 $7700.00 Window Closed / Lapsed

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