US4240041A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High-frequency amplifier circuit
Assignee: Toshiba Corp
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Filing: 1979-06-05
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Granted: 1980-12-16
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Expires: 1999-06-05
Abstract
Abstract Disclosed is a high-frequency amplifier circuit which comprises a first transistor with its base coupled to a high-frequency input terminal and grounded through a first diode and emitter grounded, a second transistor with its emitter coupled to the collector of the first transistor, base grounded through second and third diodes and coupled to a reference power supply terminal through a resistor, and collector directly coupled to the reference power supply terminal, and a third transistor with its base coupled to the emitter of the second transistor, emitter grounded, and collector coupled to an output terminal.
Inventors
- 👤 Masaru Hashimoto
- 👤 Motoaki Yoshinaga
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 11:50
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; H03F3/189; H03F3/19; H03F3/195
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
148 words
A high-frequency amplifier circuit comprising: input and output terminals, first and second power supply terminals, a first PN junction device coupled between said input terminal and said first power supply terminal, current source means, a series circuit of a plurality of PN junction devices coupled between said current source means and said first power supply terminal, a first transistor with its base coupled to said input terminal and emitter coupled to said first power supply terminal, a second transistor with its emitter coupled to the collector of said first transistor, base coupled to the junction between said current source means and said series circuit of the PN junction devices, and collector coupled to said second power supply terminal, and a third transistor with its base coupled to the emitter of said second transistor, emitter coupled to said first power supply terminal, and collector coupled to said output terminal.
Claim 2
Dependent Claim
148 words
A high-frequency amplifier circuit comprising: input and output terminals, first and second power supply terminals, a first PN junction device coupled between said input terminal and said first power supply terminal, current source means, a series circuit of a plurality of PN junction devices coupled between said current source means and said first power supply terminal, a first transistor with its base coupled to said input terminal and emitter coupled to said first power supply terminal, a second transistor with its emitter coupled to the collector of said first transistor, base coupled to the junction between said current source means and said series circuit of the PN junction devices, and collector coupled to said second power supply terminal, and a third transistor with its base coupled to the emitter of said second transistor, emitter coupled to said first power supply terminal, and collector coupled to said output terminal.
Claim 3
Dependent Claim
42 words
A high-frequency amplifier circuit according to claim 1, wherein said first to third transistors are formed of npn transistors, and said first to third PN junction devices are formed of npn transistors with their respective bases and collectors coupled with one another.
Claim 4
Dependent Claim
49 words
A high-frequency amplifier circuit according to claim 1 further comprising a fourth transistor with its base coupled to said input terminal, collector coupled to the junction between said current source means and said series circuit of the PN junction devices, and emitter coupled to said first power supply terminal.
Claim 5
Dependent Claim
42 words
A high-frequency amplifier circuit according to claim 3, wherein said first to fourth transistors are formed of npn transistors, and said first to third PN junction devices are formed of npn transistors with their respective bases and collectors coupled with one another.
Claim 6
Dependent Claim
18 words
A high-frequency amplifier circuit according to claim 1 or 3, wherein said current source means is a resistor.
Claim 7
Dependent Claim
156 words
A high-frequency amplifier circuit comprising: input and output terminals, first and second power supply terminals, a first PN junction device coupled between said input terminal and said first power supply terminal, current source means, a series circuit of a plurality of PN junction devices coupled between said current source means and said first power supply terminal, a first transistor with its base coupled to the junction between said current source means and said series circuit of the PN junction devices, and collector coupled to said second power supply terminal, a second transistor with its base coupled to the emitter of said first transistor, emitter coupled to said first power supply terminal, and collector coupled to said output terminal, and control means coupled between the base of said second transistor and said first power supply terminal, whereby the base potential of said second transistor is controlled in response to an input signal supplied to said input terminal.
Claim 8
Dependent Claim
156 words
A high-frequency amplifier circuit comprising: input and output terminals, first and second power supply terminals, a first PN junction device coupled between said input terminal and said first power supply terminal, current source means, a series circuit of a plurality of PN junction devices coupled between said current source means and said first power supply terminal, a first transistor with its base coupled to the junction between said current source means and said series circuit of the PN junction devices, and collector coupled to said second power supply terminal, a second transistor with its base coupled to the emitter of said first transistor, emitter coupled to said first power supply terminal, and collector coupled to said output terminal, and control means coupled between the base of said second transistor and said first power supply terminal, whereby the base potential of said second transistor is controlled in response to an input signal supplied to said input terminal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-12-16 | 1984-06-16 | 1984-12-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-12-16 | 1988-06-16 | 1988-12-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-12-16 | 1992-06-16 | 1992-12-16 | $7700.00 | Window Closed / Lapsed |