High speed loading of output register of CCD array system

Claim 1

A method for transferring charges from a charge-coupled device (CCD) array comprising a semiconductor substrate, n columns of channels in the substrate, each channel comprising a substrate region defined by potential barriers in the substrate at the channel edges, and electrodes over the channels responsive to applied voltages for the storage of rows of charges in the channels and the propagation of said rows of charges along the channels, in the column direction, comprising the steps of: translating the n charges in a row of the array, into n/m groups of m serial charges, where each group of m serial charges originates in m adjacent columns, and where m and n are integers and m is greater than 1 and is much smaller than n; providing m CCD output registers each with n/m stages; and concurrently serially shifting the n/m groups of serial charges into the respective n/m stages of the output registers, the corresponding charges in the respective groups being shifted in parallel into the output register into which they are stored, each charge in each group of serial charges being concurrently shifted into the same stage of a different output register, whereby upon the completion of the serial shifting, each output register stores 1/m'th of a row of charges from each m'th column of the array.

Claim 2

A method for transferring charges from a charge-coupled device (CCD) array comprising a semiconductor substrate, n columns of channels in the substrate, each channel comprising a substrate region defined by potential barriers in the substrate at the channel edges, and electrodes over the channels responsive to applied voltages for the storage of rows of charges in the channels and the propagation of said rows of charges along the channels, in the column direction, comprising the steps of: translating the n charges in a row of the array, into n/m groups of m serial charges, where each group of m serial charges originates in m adjacent columns, and where m and n are integers and m is greater than 1 and is much smaller than n; providing m CCD output registers each with n/m stages; and concurrently serially shifting the n/m groups of serial charges into the respective n/m stages of the output registers, the corresponding charges in the respective groups being shifted in parallel into the output register into which they are stored, each charge in each group of serial charges being concurrently shifted into the same stage of a different output register, whereby upon the completion of the serial shifting, each output register stores 1/m'th of a row of charges from each m'th column of the array.

Claim 4

A system for transferring charges from a charge-coupled device (CCD) array comprising a semiconductor substrate, n columns of channels in the substrate, each channel comprising a substrate region defined by potential barriers in the substrate at the channel edges, and electrodes over the channels responsive to applied voltages for the storage of rows of charges in the channels and the propagation of said rows of charges along the channels, in the column direction, comprising n/m CCD temporary storage shift registers, each with m stages; n/m parallel-to-serial converter means for translating the n charges in a row of the array, into n/m groups of m serial charges, each group of m serial charges originating in m adjacent columns, and where m and n are integers and m is greater than 1 and is much smaller than n; means for concurrently serially shifting said n/m groups of charges into said n/m temporary storage registers, respectively; m CCD output registers, each with n/m stages; and means for concurrently serially shifting the charges stored in said n/m registers into the respective n/m stages of the m CCD output registers, each charge in each group of serial charges being shifted into the same stage of a different output register so that upon the completion of the concurrent shifting each output register stores n/m'th of a row of charges from each m'th column of the array.

Claim 5

A system for transferring charges from a charge-coupled device (CCD) array comprising a semiconductor substrate, n columns of channels in the substrate, each channel comprising a substrate region defined by potential barriers in the substrate at the channel edges, and electrodes over the channels responsive to applied voltages for the storage of rows of charges in the channels and the propagation of said rows of charges along the channels, in the column direction, comprising n/m CCD temporary storage shift registers, each with m stages; n/m parallel-to-serial converter means for translating the n charges in a row of the array, into n/m groups of m serial charges, each group of m serial charges originating in m adjacent columns, and where m and n are integers and m is greater than 1 and is much smaller than n; means for concurrently serially shifting said n/m groups of charges into said n/m temporary storage registers, respectively; m CCD output registers, each with n/m stages; and means for concurrently serially shifting the charges stored in said n/m registers into the respective n/m stages of the m CCD output registers, each charge in each group of serial charges being shifted into the same stage of a different output register so that upon the completion of the concurrent shifting each output register stores n/m'th of a row of charges from each m'th column of the array.