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US4236116A Expired / Lapsed US ⏱️ 0.0 years remaining

Level control circuitry for two way communication system

Assignee: Motorola Solutions Inc
•
Filing: 1978-06-26
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Granted: 1980-11-25
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Expires: 1998-06-26
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Abstract

Abstract Signals carried over a multiplexed transmission medium between first and second stations suffer transmission losses such that the signal one station generates has a substantially greater magnitude than the signal it receives from the other station. A differential amplifier is utilized to extract and amplify the weaker signal thereby establishing signal balance. Following the differential amplifier is an automatic gain control stage which includes novel sample and hold and activity checker circuitry. The activity checker responds to the frequency of input signals to either allow variable gain control action or, when the frequency is representative of noise, to hold the gain control at its instantaneous value prior to the onset of noise.

Inventors

  • 👤 Kermit Beseke
  • 👤 Ronald Kopecki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 17:07
CPC Classifications
H; H04; H04B; H04B3/00; H04B3/02; H04B3/04; H04B3/06

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 202 words
An automatic gain control circuit comprising: controlled attenuator means having an input, output and control terminals, said attenuator means receiving signals at its input terminal, attenuating said signals by a predetermined factor dependent upon a control signal at said control terminal and producing said attenuated signal at said output terminal; control signal generating means coupled to said output terminal for producing a perdetermined control signal in response to the signal levels thereat; sample and hold means, coupled between said control signal generating means and the control terminal of said controlled attenuator means, and being operable in a first mode to couple said produced control signal to said control terminal and being operable in a second mode to store the instantaneous value of said control signal and couple said stored signal to said control terminal; and zero crossing detector means for detecting the number of zero crossings made by a received signal at said attenuator input terminal and activating said sample and hold means to said first mode upon detecting a number of zero crossings corresponding to an information signal and activating said sample and hold means to said second mode upon detecting a number of zero crossings corresponding to a noise signal.
Claim 2
Dependent Claim 202 words
An automatic gain control circuit comprising: controlled attenuator means having an input, output and control terminals, said attenuator means receiving signals at its input terminal, attenuating said signals by a predetermined factor dependent upon a control signal at said control terminal and producing said attenuated signal at said output terminal; control signal generating means coupled to said output terminal for producing a perdetermined control signal in response to the signal levels thereat; sample and hold means, coupled between said control signal generating means and the control terminal of said controlled attenuator means, and being operable in a first mode to couple said produced control signal to said control terminal and being operable in a second mode to store the instantaneous value of said control signal and couple said stored signal to said control terminal; and zero crossing detector means for detecting the number of zero crossings made by a received signal at said attenuator input terminal and activating said sample and hold means to said first mode upon detecting a number of zero crossings corresponding to an information signal and activating said sample and hold means to said second mode upon detecting a number of zero crossings corresponding to a noise signal.
Claim 3
Dependent Claim 68 words
The automatic gain control circuit of claim 1 wherein the zero crossing detector means comprises: zero transition detector means for determining the number of zero transitions of the signal at the attenuator input terminal, and comparator means for producing an output signal to activate said sample and hold means to its first mode if and only if the number of zero transitions is less than a predetermined minimum.
Claim 4
Dependent Claim 143 words
The automatic gain control circuit of claim 2 wherein: said zero transition detector means includes means for producing a pulse of perdetermined time duration in response to each zero crossing of the signal at the attenuator input terminal and integrator means for integrating said pulses to produce a DC signal having a magnitude representative of the average number of said pulses occurring over a time interval, and wherein said comparator means comprises a voltage comparator having the input from said integrator means at one input and a predetermined level DC signal at its other input such that for integrator produced DC signals representative of the zero transitions at the attenuator input being below said predetermined level said comparator activates said sample and hold means to its first mode, said integrator produced signal otherwise activating said sample and hold means to its second mode.

References Cited (Backward Citations)

GB1094357A Cited
US3602825A Cited
US3848194A Cited
US4037163A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-11-25 1984-05-26 1984-11-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-11-25 1988-05-26 1988-11-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-11-25 1992-05-26 1992-11-25 $7700.00 Window Closed / Lapsed

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