US4225878A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated circuit on chip trimming
Assignee: National Semiconductor Corp
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Filing: 1979-03-08
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Granted: 1980-09-30
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Expires: 1999-03-08
Abstract
Abstract In a monolithic integrated circuit, on-chip trimming is implemented by connecting a zener diode across each element of a plural element trimmable resistor. Adjacent diodes are connected back to back and a pair of conventional bonding pads connected thereto. In trimming, when it is desired to short out one of the trimmable elements, the associated diode is subjected to an overload pulse by means of test probes applied to the bonding pads. Since the diodes are connected back to back, the pulse polarity will determine which diode is overloaded in the reverse bias condition. Thus, the trimmable element to be shorted is determined by pulse polarity and only one bonding pad is needed for each pair of trimmable elements.
Inventors
- 👤 Robert C. Dobkin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 08:49
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; Y; Y10; Y10S; Y10S148/00; Y10S148/055
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
151 words
In integrated circuit trimming, wherein a series of passive circuit elements are provided with a shunting zener diode and a series of circuit pads are connected to said diodes whereby each zener diode can selectively be coupled to a source of reverse potential that is greater than the reverse breakdown of said diode and said source is capable of supplying sufficient current to cause said diode to short itself permanently thereby to bypass said element, the improvement comprising: means for connecting adjacent zener diodes in said series in back-to-back relationship; and means for making pad connections only to adjacent pairs of back-to-back zener diodes whereby the diode in said pair is subjected to a reverse polarity pulse when said diode is to be shorted and the pulse polarity can be reversed when the other diode in said pair is to be shorted, and whereby a reduced bonding pad count is achieved.
Claim 2
Dependent Claim
151 words
In integrated circuit trimming, wherein a series of passive circuit elements are provided with a shunting zener diode and a series of circuit pads are connected to said diodes whereby each zener diode can selectively be coupled to a source of reverse potential that is greater than the reverse breakdown of said diode and said source is capable of supplying sufficient current to cause said diode to short itself permanently thereby to bypass said element, the improvement comprising: means for connecting adjacent zener diodes in said series in back-to-back relationship; and means for making pad connections only to adjacent pairs of back-to-back zener diodes whereby the diode in said pair is subjected to a reverse polarity pulse when said diode is to be shorted and the pulse polarity can be reversed when the other diode in said pair is to be shorted, and whereby a reduced bonding pad count is achieved.
Claim 3
Dependent Claim
61 words
The improvement of claim 1 wherein said pulse has an energy content that is selected to reliably short out the diode in said pair that is reverse biased by said pulse while not affecting the diode in said pair that is forward biased by said pulse and not affecting elements in said integrated that are connected to said passive circuit elements.
Claim 4
Dependent Claim
54 words
The improvement of claim 2 wherein said integrated circuit is composed of silicon, said diodes have an area of about one square mil, and said pulse has a voltage magnitude in the range of 20 to 25 volts, a current maximum of about 1 ampere and a duration of about 5 to 15 milliseconds.
Claim 5
Dependent Claim
122 words
A silicon monolithic integrated circuit including active and passive components in a combination that can be trimmed in wafer form using a trimmable section, said trimmable section comprising: a plurality of series connected passive elements, selected ones of which are to be shorted; a plurality of zener diodes arrayed in back-to-back connected pairs and said diodes being connected to said passive elements to permit the association of a zener diode with each passive element in said plurality that is to be shorted to achieve trimming; and means coupled to each of said back-to-back connected pairs to permit the application of electrical energy to any one of said pairs whereby a single diode in said one of said pairs can be selectively shorted.
Claim 6
Dependent Claim
122 words
A silicon monolithic integrated circuit including active and passive components in a combination that can be trimmed in wafer form using a trimmable section, said trimmable section comprising: a plurality of series connected passive elements, selected ones of which are to be shorted; a plurality of zener diodes arrayed in back-to-back connected pairs and said diodes being connected to said passive elements to permit the association of a zener diode with each passive element in said plurality that is to be shorted to achieve trimming; and means coupled to each of said back-to-back connected pairs to permit the application of electrical energy to any one of said pairs whereby a single diode in said one of said pairs can be selectively shorted.
Claim 7
Dependent Claim
92 words
The integrated circuit of claim 4 wherein each back-to-back diode pair comprises: an isolated region of said silicon integrated circuit; a transistor base diffusion in said isolated region to provide a common diode anode electrode; a pair of spaced apart transistor emitter diffusions inside said base diffusion to provide a pair of diode anodes; means for connecting said common diode anode to said passive elements; and means for connecting each of said pair of diode anodes to separate ones of said passive elements and to separate contact pads on said integrated circuit.
Claim 8
Dependent Claim
104 words
The integrated circuit of claim 4 wherein each back-to-back diode pair comprises: an isolated region of said silicon integrated circuit; a conductive buried layer underlying said isolated region; an isolation diffusion within said isolated region and terminated by said buried layer to provide a common diode anode electrode; a pair of spaced apart emitter diffusions inside said isolation diffusion to provide a pair of diode cathodes; means for connecting said common diode anode to said passive elements; and means for connecting each of said pair of diode cathodes to separate ones of said passive elements and to separate contact pads on said integrated circuit.
Claim 9
Dependent Claim
33 words
The integrated circuit of claim 5 or 6 wherein said pads provide access means that allows the coupling of a pulse generator by way of contact probes for said application of electrical energy.
Claim 10
Dependent Claim
22 words
The integrated circuit of claim 7 wherein said single diode of said pair is selected by the polarity of said pulse generator.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-09-30 | 1984-03-31 | 1984-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-09-30 | 1988-03-31 | 1988-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-09-30 | 1992-03-31 | 1992-09-30 | $7700.00 | Window Closed / Lapsed |