US4225865A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Gain-controlled amplifier circuits
Assignee: Ferranti International PLC
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Filing: 1979-03-15
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Granted: 1980-09-30
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Expires: 1999-03-15
Abstract
Abstract Apparatus for controlling the gains of a pair of gain-matched amplifiers includes means for applying a pilot tone of constant amplitude to each amplifier through separate attenuators during a repeated correction time interval. Three control loops are provided, one of which compares the output of one amplifier with a reference signal at times other than a correction time interval to control the gain of that amplifier. A second loop compares the output of the other amplifier with the same reference signal only during each correction time interval to control the gain of the second amplifier. Finally, the third loop compares the output of the first amplifier and the reference signal during each correction time interval to produce a signal controlling the two attenuators.
Inventors
- 👤 Hugh McPherson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 17:25
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3052; H03G3/3073; G; G01; G01S; G01S7/00; G01S7/02; G01S7/28; G01S7/285; G01S7/34
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
194 words
A gain-controlled amplifier circuit which includes a pair of gain-controlled amplifiers, signal generating means operable to generate a pilot signal of constant amplitude during a repeated correction time interval, attenuator means operable to control the level at which said pilot signal is applied equally to the inputs of said two amplifiers, a first automatic gain control loop comprising means for subtracting the output of one amplifier from a reference gain control signal at a time other than during the correction time interval to derive a first error signal for application to the gain control input of said one amplifier, a second automatic gain control loop comprising means for subtracting the output of the other amplifier from the reference gain control signal to derive a second error signal for application to the gain control input of the said other amplifier only during the correction time interval, and a correction loop comprising means for subtracting the output of said one amplifier from the reference gain control signal to derive a correction signal for application to the attenuator means during the correction time interval to control the level of the pilot signal applied to the two amplifiers.
Claim 2
Dependent Claim
194 words
A gain-controlled amplifier circuit which includes a pair of gain-controlled amplifiers, signal generating means operable to generate a pilot signal of constant amplitude during a repeated correction time interval, attenuator means operable to control the level at which said pilot signal is applied equally to the inputs of said two amplifiers, a first automatic gain control loop comprising means for subtracting the output of one amplifier from a reference gain control signal at a time other than during the correction time interval to derive a first error signal for application to the gain control input of said one amplifier, a second automatic gain control loop comprising means for subtracting the output of the other amplifier from the reference gain control signal to derive a second error signal for application to the gain control input of the said other amplifier only during the correction time interval, and a correction loop comprising means for subtracting the output of said one amplifier from the reference gain control signal to derive a correction signal for application to the attenuator means during the correction time interval to control the level of the pilot signal applied to the two amplifiers.
Claim 3
Dependent Claim
24 words
A circuit as claimed in claim 1 which includes switching means operable to activate the signal generating means only during the correction time interval.
Claim 4
Dependent Claim
36 words
A circuit as claimed in claim 2 including means for operating the switching means for derivation of said second error signal and said correction signal only during the period of operation of the signal generating means.
Claim 5
Dependent Claim
29 words
A circuit as claimed in claim 1, said signal generating means comprising means for generating the pilot signal at a frequency within the pass-band of the two gain-controlled amplifiers.
Claim 6
Dependent Claim
27 words
A circuit as claimed in claim 4, said signal generating means comprising means for generating the pilot signal at the normal center frequency of the two amplifiers.
Claim 7
Dependent Claim
18 words
A circuit as claimed in claim 4 said signal generating means comprising means for generating a sinusoidal form.
Claim 8
Dependent Claim
34 words
A circuit as claimed in claim 1 in which the two gain-controlled amplifiers are the sum and difference amplifiers of a monopulse radar receiver, the correction time interval occurring during the radar dead time.
Claim 9
Dependent Claim
36 words
A circuit as claimed in claim 7 in which each of the two gain-controlled amplifiers is preceded by mixing means, the output of the signal generating means being applied to the inputs of the mixing means.
References Cited (Backward Citations)
US3921173A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-09-30 | 1984-03-31 | 1984-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-09-30 | 1988-03-31 | 1988-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-09-30 | 1992-03-31 | 1992-09-30 | $7700.00 | Window Closed / Lapsed |