US4218665A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Band-pass filter
Assignee: NEC Corp
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Filing: 1978-03-17
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Granted: 1980-08-19
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Expires: 1998-03-17
Abstract
Abstract A bandpass filter is disclosed which includes a low-pass filter and an analog delay circuit in which the delay time is set by a clock signal. THe analog delay circuit samples the voltage of the low-pass filter capacitor and delays the sampled voltage according to the clock signal. The output of the analog delay circuit is then used to equalize within a certain period of time the voltage of the low-pass filter capacitor. The analog delay circuit may consist of an integrated circuit BBD (Bucket Brigade Device) or CCD (Charge Coupled Device).
Inventors
- 👤 Hisashi Fujisaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 17:32
CPC Classifications
H; H03; H03H; H03H19/00; H03H19/002; H03H15/00; H03H15/02
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
124 words
A band-pass filter having input and output terminals and a common terminal comprising: a lowpass filter consisting of a resistor connected between said input and output terminals and a capacitor connected between said output terminal and said common terminal; a clock signal generator for generating a clock signal; an analog signal delay circuit responsive to said clock signal generator and connected to said output terminal for sampling the voltage of said capacitor and delaying the sampled voltage according to said clock signal; and means connected between the output of said analog signal delay circuit and said output terminal and actuated in synchronism with said clock signal for approximately equalizing the voltage of said capacitor to the output voltage of said analog signal delay circuit.
Claim 2
Dependent Claim
124 words
A band-pass filter having input and output terminals and a common terminal comprising: a lowpass filter consisting of a resistor connected between said input and output terminals and a capacitor connected between said output terminal and said common terminal; a clock signal generator for generating a clock signal; an analog signal delay circuit responsive to said clock signal generator and connected to said output terminal for sampling the voltage of said capacitor and delaying the sampled voltage according to said clock signal; and means connected between the output of said analog signal delay circuit and said output terminal and actuated in synchronism with said clock signal for approximately equalizing the voltage of said capacitor to the output voltage of said analog signal delay circuit.
Claim 3
Dependent Claim
21 words
A band-pass filter as claimed in claim 1, wherein said analog signal delay circuit consists of a BBD (Bucket Brigade Device).
Claim 4
Dependent Claim
21 words
A band-pass filter as claimed in claim 1, wherein said analog signal delay circuit consists of a CCD (Charge Coupled Device).
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-08-19 | 1984-02-18 | 1984-08-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-08-19 | 1988-02-18 | 1988-08-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-08-19 | 1992-02-18 | 1992-08-19 | $7700.00 | Window Closed / Lapsed |