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US4217655A Expired / Lapsed US ⏱️ 0.0 years remaining

Clock circuit having a swept output frequency

Assignee: OI Glass Inc
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Filing: 1978-08-17
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Granted: 1980-08-12
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Expires: 1998-08-17
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Abstract

Abstract Disclosed is a digital circuit for generating a swept clock frequency having a linear rate of change. A constant frequency signal is divided by a counter signal representative of the inverse of a linearly changing time dependent variable. The value of the counter signal is varied at the proper rate by means of a pair of rate multipliers and a frequency divider. Included are means for controlling the slope of the output frequency.

Inventors

  • 👤 Thomas F. Michalski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 19:16
CPC Classifications
H; H03; H03K; H03K7/00; H03K7/06; H03B; H03B23/00; H03B2200/00; H03B2200/006; H03B2200/0092

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 97 words
Apparatus for generating a swept clock frequency having a linear rate of change, comprising: a counter; means for clocking said counter comprising: a first rate multiplier, said first rate multiplier, having an input from said counter; constant frequency generator means for clocking said first rate multiplier; a second rate multiplier, said second rate multiplier being clocked by the output of said first rate multiplier and having an input from said counter; and a frequency divider for dividing the output of said second rate multiplier, wherein the output of said frequency divider is utilized to clock said counter.
Claim 2
Dependent Claim 97 words
Apparatus for generating a swept clock frequency having a linear rate of change, comprising: a counter; means for clocking said counter comprising: a first rate multiplier, said first rate multiplier, having an input from said counter; constant frequency generator means for clocking said first rate multiplier; a second rate multiplier, said second rate multiplier being clocked by the output of said first rate multiplier and having an input from said counter; and a frequency divider for dividing the output of said second rate multiplier, wherein the output of said frequency divider is utilized to clock said counter.
Claim 3
Dependent Claim 24 words
The apparatus of claim 1 wherein said constant frequency generator means for controlling the rate of change of said linearly changing swept clock frequency.
Claim 4
Dependent Claim 28 words
The apparatus of claim 2 wherein said controlling means includes means for providing one of a plurality of different constant frequency signals to clock said first rate multiplier.
Claim 5
Dependent Claim 136 words
Apparatus for generating a swept clock frequency which is proportional to a particular linearly changing time dependent variable, comprising: a presettable counter for storing an initial digital signal and said means for changing the value of digital signal which includes: a first rate multiplier having as its input the output of said counter; means for generating a constant frequency signal to the clock input of said first rate multiplier; a second rate multiplier having as its input the output of said counter, said second rate multiplier being clocked by the output of said first rate multiplier; a frequency divider having as its input the output of said second rate multiplier, and means for successively dividing said constant frequency signal by said changing digital signal, thereby obtaining a swept output frequency which is proportional to said variable.
Claim 6
Dependent Claim 136 words
Apparatus for generating a swept clock frequency which is proportional to a particular linearly changing time dependent variable, comprising: a presettable counter for storing an initial digital signal and said means for changing the value of digital signal which includes: a first rate multiplier having as its input the output of said counter; means for generating a constant frequency signal to the clock input of said first rate multiplier; a second rate multiplier having as its input the output of said counter, said second rate multiplier being clocked by the output of said first rate multiplier; a frequency divider having as its input the output of said second rate multiplier, and means for successively dividing said constant frequency signal by said changing digital signal, thereby obtaining a swept output frequency which is proportional to said variable.

References Cited (Backward Citations)

US3621403A Cited
US3633017A Cited
US3739374A Cited
US3840814A Cited
US3870963A Cited
US4075544A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-08-12 1984-02-11 1984-08-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-08-12 1988-02-11 1988-08-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-08-12 1992-02-11 1992-08-12 $7700.00 Window Closed / Lapsed

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