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US4216433A Expired / Lapsed US ⏱️ 0.0 years remaining

Threshold circuit

Assignee: International Telephone and Telegraph Corp
•
Filing: 1978-01-13
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Granted: 1980-08-05
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Expires: 1998-01-13
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Abstract

Abstract There is disclosed a threshold circuit for a long coded pulse having a given amplitude subdivided into a plurality of chips, each providing a code bit. A first circuit receives the coded pulse to compress the coded pulse into a shorter pulse of much greater amplitude than the given amplitude and to detect the compressed pulse. A second circuit also receives the coded pulse, detects the coded pulse and provides an amplitude threshold voltage. A third circuit coupled to the first and second circuits produces a finite output when the amplitude of the compressed pulse is greater than the amplitude of the threshold voltage and a zero output when the amplitude of the compressed pulse is less than the amplitude of the threshold voltage.

Inventors

  • 👤 Jesse S. LeGrand

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 19:25
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/02; G01S13/06; G01S13/08; G01S13/10; G01S13/26; G01S13/28; G01S13/284

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 130 words
A threshold circuit for a long coded pulse having a given amplitude subdivided into a plurality of chips each providing a code bit comprising: an input for said coded pulse; first means coupled to said input to compress said coded pulse into a short pulse of much greater amplitude than said given amplitude and to detect said compressed pulse; second means coupled to said input to detect said coded pulse and to provide an amplitude threshold voltage; and third means coupled to said first and second means to produce a binary "1" output when the amplitude of said compressed pulse is greater than the amplitude of said threshold voltage and a binary "0" output when the amplitude of said compressed pulse is less than the amplitude of said threshold voltage.
Claim 2
Dependent Claim 130 words
A threshold circuit for a long coded pulse having a given amplitude subdivided into a plurality of chips each providing a code bit comprising: an input for said coded pulse; first means coupled to said input to compress said coded pulse into a short pulse of much greater amplitude than said given amplitude and to detect said compressed pulse; second means coupled to said input to detect said coded pulse and to provide an amplitude threshold voltage; and third means coupled to said first and second means to produce a binary "1" output when the amplitude of said compressed pulse is greater than the amplitude of said threshold voltage and a binary "0" output when the amplitude of said compressed pulse is less than the amplitude of said threshold voltage.
Claim 3
Dependent Claim 91 words
A threshold circuit according to claim 1, wherein said first means includes a first bandpass filter coupled to said input, a first delay line means coupled to said first filter, said first delay line means having a length approximately as long as said coded pulse, a first plurality of taps loosely coupled to and equally spaced along said first delay line means, the number of said first taps being approximately equal to the number of said chips, and a first envelope detector coupled in common to said first plurality of taps.
Claim 4
Dependent Claim 116 words
A threshold circuit according to claim 2, wherein said second means includes a second bandpass filter coupled to said input, a second envelope detector coupled to said second filter, a second delay line means coupled to said second envelope detector, said second delay line means having a length approximately as long as said coded pulse, a second plurality of taps loosely coupled to and equally spaced along said second delay line means, the number of said second taps being approximately equal to the number of said chips, at least a plurality of diodes each coupled to a different one of said second taps, and an amplifier coupled in common to each of said plurality of diodes.
Claim 5
Dependent Claim 27 words
A threshold circuit according to claim 3, wherein said second means further includes a weighted attenuator coupled in series with predetermined ones of said plurality of diodes.
Claim 6
Dependent Claim 32 words
A threshold circuit according to claim 4, wherein said weighted attenuators are coupled between an associated one of said second plurality of taps and an associated one of said plurality of diodes.
Claim 7
Dependent Claim 25 words
A threshold circuit according to claim 4, wherein said weighted attenuators are coupled between an associated one of said plurality of diodes and said amplifier.
Claim 8
Dependent Claim 15 words
A threshold circuit according to claim 4, wherein said third means includes a differential comparator.
Claim 9
Dependent Claim 15 words
A threshold circuit according to claim 3, wherein said third means includes a differential comparator.
Claim 10
Dependent Claim 106 words
A threshold circuit according to claim 1, wherein said second means includes a bandpass filter coupled to said input, an envelope detector coupled to said filter, a delay line means coupled to said envelope detector, said delay line means having a length approximately as long as said coded pulse, a plurality of taps loosely coupled to and equally spaced along said delay line means, the number of said taps being approximately equal to the number of said chips, at least a plurality of diodes each coupled to a different one of said taps, and an amplifier coupled in common to each of said plurality of diodes.
Claim 11
Dependent Claim 27 words
A threshold circuit according to claim 9, wherein said second means further includes a weighted attenuator coupled in series with predetermined ones of said plurality of diodes.
Claim 12
Dependent Claim 31 words
A threshold circuit according to claim 10, wherein said weighted attenuators are coupled between an associated one of said plurality of taps and an associated one of said plurality of diodes.
Claim 13
Dependent Claim 25 words
A threshold circuit according to claim 10, wherein said weighted attenuators are coupled between an associated one of said plurality of diodes and said amplifier.
Claim 14
Dependent Claim 15 words
A threshold circuit according to claim 10, wherein said third means includes a differential comparator.
Claim 15
Dependent Claim 15 words
A threshold circuit according to claim 9. wherein said third means includes a differential comparator.
Claim 16
Dependent Claim 15 words
A threshold circuit according to claim 1, wherein said third means includes a differential comparator.

References Cited (Backward Citations)

US3896433A Cited
US3968490A Cited
US4045798A Cited
US3995270A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-08-05 1984-02-04 1984-08-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-08-05 1988-02-04 1988-08-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-08-05 1992-02-04 1992-08-05 $7700.00 Window Closed / Lapsed

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