Method for binary multiplication of a number by a sum of two numbers and a digital system for implementation thereof

Claim 2

Method of binary multiplication of a number by a sum of two numbers comprising the steps of: converting in parallel a multiplier expressed by two numbers-summands presented in binary form, without performing effective addition of said summands, into bit groups representing the integers from the range -2 g-1 to +2 g-1 said integers being the digits of the multiplier expressed in a redundant positional form with the basis 2 g , where g is an integer from the range from 1 to 4; forming partial products being the multiplicand multiples shifted with respect to each other, said multiples being determined by the bit groups representing said integers from the range -2 g-1 to +2 g-1 ; adding said partial products to obtain a full product of the number by the sum of two numbers; said converting step being performed so that bits being identically grouped in both multiplier summands into g position groups are processed so that, for determining one number from the range -2 g-1 to 2 g-1 , use is made of bits belonging to a maximum of three position groups of each of said multiplier summands and/or using sign bits.

Claim 3

Method as defined in claim 1 including the steps of: negating bits chosen from multiplier summands and adding in 1 bit according to the rule of change of binary number form into the equivalent binary conpletmentary number form, while converting the multiplier summands into the bit groups representing integers in the range -2 g-1 to +2 g-1 ; and/or replacing the 1 bits representing values -1 in the most significant positions within chosen bit groups of the multiplier by the equivalent pairs of the 1 bits representing 1 1, and values +1 by 1 1, in accordance with the rule -1.2 i =-1.2 i +1.2 i and the rule +1.2 i =+1.2 i+1 -1.2 i , including the more significant 1's in said bit paris in the adjacent more significant groups.

Claim 4

Digital system for multiplication of a number of a sum of two numbers comprising: parallel registers (A,B) storing multiplier summands; parallel register (C) storing a multiplicand; subsystem (D) converting in parallel a multiplier expressed by two numbers-summands presented in binary form, without performing effective addition of said summands, into bit groups which represent the integers from the range -2 g-1 to +2 g-1 , said integers being the digits of multiplier expressed in a redundant positional form with the basis 2 g , where g is an integer in the range from 1 to 4; subsystem (P) forming partial products being the multiplicand multiples shifted with respect to each other, said multiples being determined by the bit groups representing said integers in the range -2 g-1 to +2 g-1 ; multi-summand adder (S) adding said partial products to obtain full product of a number by a sum of two numbers; said subsystem (D) converting the multiplier summands containing parallelly working switching networks having no direct connections with one another, each of said switching networks (D 0 , D.sub. 2, D 4 , D 6 ) having inputs connected with outputs of at most three groups of binary positions of each of two said parallel registers (A,B) storing the multiplier summands, and/or inputs connected with outputs of the sign positions of said parallel registers (A,B), each of said networks converting signals representing bits belonging to a maximum of three bit groups of each of the multiplier summands and also the sign bits of said multiplier summands if said summands are in sign magnitude form to obtain the output signals representing the integer from the range -2 g+1 to +2 g-1 , said integer specifying a multiple of the multiplicand for one partial product.

Claim 5

Digital system for multiplication of a number of a sum of two numbers comprising: parallel registers (A,B) storing multiplier summands; parallel register (C) storing a multiplicand; subsystem (D) converting in parallel a multiplier expressed by two numbers-summands presented in binary form, without performing effective addition of said summands, into bit groups which represent the integers from the range -2 g-1 to +2 g-1 , said integers being the digits of multiplier expressed in a redundant positional form with the basis 2 g , where g is an integer in the range from 1 to 4; subsystem (P) forming partial products being the multiplicand multiples shifted with respect to each other, said multiples being determined by the bit groups representing said integers in the range -2 g-1 to +2 g-1 ; multi-summand adder (S) adding said partial products to obtain full product of a number by a sum of two numbers; said subsystem (D) converting the multiplier summands containing parallelly working switching networks having no direct connections with one another, each of said switching networks (D 0 , D.sub. 2, D 4 , D 6 ) having inputs connected with outputs of at most three groups of binary positions of each of two said parallel registers (A,B) storing the multiplier summands, and/or inputs connected with outputs of the sign positions of said parallel registers (A,B), each of said networks converting signals representing bits belonging to a maximum of three bit groups of each of the multiplier summands and also the sign bits of said multiplier summands if said summands are in sign magnitude form to obtain the output signals representing the integer from the range -2 g+1 to +2 g-1 , said integer specifying a multiple of the multiplicand for one partial product.

Claim 6

Digital system for multiplication of a number by a sum of two numbers comprising: parallel registers (A,B) storing multiplier summands; parallel register (C) storing a multiplicand; subsystem (D) converting in parallel a multiplier expressed by two numbers-summands presented in binary form, without performing effective addition of said summands, into bit groups which represent the integers from the range -2 g-1 to +2 g-1 said integers being the digits of multiplier expressed in a redundant positional form with the basis 2 g , where g is an integer in the range from 1 to 4; subsystem (P) forming partial products being the multiplicand multiples shifted with respect to each other, said multiples being determined by the bit groups representing said integers in the range -2 g-1 to +2 g-1 ; multi-summand adders (S) adding obtained partial products together to obtain full product of a number by a sum of two numbers; wherein said subsystem (D) converting the multiplier summands contains at least two layers of switching networks having no immediate connections with the range of the same layer (D.sub. 0 ', D 2 ', D 4 ', D 6 ', and D 0 ", D 2 ", D 4 ", D 6 "), inputs of each of said switching networks being connected with such outputs of the switching networks of the preceding layers or with such outputs of registers (A,B) storing the multiplier summands that the signals on outputs of each of the switching networks of last layer (D 0 ", D 2 ", D 4 ", D 6 "), which represent a number specifying the multiple of multiplicand for one partial product, are dependent exclusively on the output signals from a maximum of three groups of binary positions of each of registers (A,B) storing the multiplier summands, and/or on the output signals from the sign positions of both said registers (A,B).

Claim 7

Digital system for multiplication of a number by a sum of two numbers comprising: parallel registers (A,B) storing multiplier summands; parallel register (C) storing a multiplicand; subsystem (D) converting in parallel a multiplier expressed by two numbers-summands presented in binary form, without performing effective addition of said summands, into bit groups which represent the integers from the range -2 g-1 to +2 g-1 said integers being the digits of multiplier expressed in a redundant positional form with the basis 2 g , where g is an integer in the range from 1 to 4; subsystem (P) forming partial products being the multiplicand multiples shifted with respect to each other, said multiples being determined by the bit groups representing said integers in the range -2 g-1 to +2 g-1 ; multi-summand adders (S) adding obtained partial products together to obtain full product of a number by a sum of two numbers; wherein said subsystem (D) converting the multiplier summands contains at least two layers of switching networks having no immediate connections with the range of the same layer (D.sub. 0 ', D 2 ', D 4 ', D 6 ', and D 0 ", D 2 ", D 4 ", D 6 "), inputs of each of said switching networks being connected with such outputs of the switching networks of the preceding layers or with such outputs of registers (A,B) storing the multiplier summands that the signals on outputs of each of the switching networks of last layer (D 0 ", D 2 ", D 4 ", D 6 "), which represent a number specifying the multiple of multiplicand for one partial product, are dependent exclusively on the output signals from a maximum of three groups of binary positions of each of registers (A,B) storing the multiplier summands, and/or on the output signals from the sign positions of both said registers (A,B).