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US4215281A Expired / Lapsed US ⏱️ 0.0 years remaining

Detection circuit and structure therefor

Assignee: Supertex LLC
•
Filing: 1978-02-22
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Granted: 1980-07-29
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Expires: 1998-02-22
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Abstract

Abstract A detection circuit particularly adapted as a smoke detector employs a minimum number of components by a CMOS integrated circuit which receives directly the output of a smoke detector on one of the inputs of an input comparator circuit which provides static input protection and a high input impedance by employing thick oxide layer over the gates of the comparator transistors. The CMOS chip also directly supplies operating current for a mechanical or piezoelectric horn. Further features include a clocked low voltage alarm; a buffer stage to permit the interconnection of a number of different detector circuits in common to a single input/output lead; and a visual LED indicator to indicate that the circuit is operating and to provide a visual indication any time the alarm condition for the circuit has been actuated.

Inventors

  • 👤 Robert L. Chao

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 10:45
CPC Classifications
G; G08; G08B; G08B29/00; G08B29/02; G08B29/04; G08B17/00; G08B17/10

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 221 words
An alarm system operated in response to an alarm condition for providing an output signal representative of such condition including, in combination, on a single integrated circuit chip: input terminal means for receiving input alarm condition signals; single comparator means having an input connected directly to said input terminal means and circuit components constructed to provide a high input impedance to said input alarm condition signals presented at said input terminal means for comparing said input alarm condition signals with a reference signal and producing an alarm signal on an output thereof in response to a predetermined relationship between said input alarm condition signals and the reference signal; driver circuit means having an input coupled to the output of said comparator means for supplying output signals to a load in response to said alarm signal generated by said comparator means when said comparator means receives an input alarm condition signal; and transistor circuit means having a low input impedance relative to the input impedance of said comparator means for providing a higher gain per unit area of the integrated chip used than said comparator means, said transistor means interconnecting the output of said comparator means with the input of said driver circuit means for controlling the output of said driver circuit means in response to the output of said comparator means.
Claim 2
Dependent Claim 221 words
An alarm system operated in response to an alarm condition for providing an output signal representative of such condition including, in combination, on a single integrated circuit chip: input terminal means for receiving input alarm condition signals; single comparator means having an input connected directly to said input terminal means and circuit components constructed to provide a high input impedance to said input alarm condition signals presented at said input terminal means for comparing said input alarm condition signals with a reference signal and producing an alarm signal on an output thereof in response to a predetermined relationship between said input alarm condition signals and the reference signal; driver circuit means having an input coupled to the output of said comparator means for supplying output signals to a load in response to said alarm signal generated by said comparator means when said comparator means receives an input alarm condition signal; and transistor circuit means having a low input impedance relative to the input impedance of said comparator means for providing a higher gain per unit area of the integrated chip used than said comparator means, said transistor means interconnecting the output of said comparator means with the input of said driver circuit means for controlling the output of said driver circuit means in response to the output of said comparator means.
Claim 3
Dependent Claim 30 words
The combination according to claim 1 wherein said driver circuit means on said integrated circuit chip supplies the full operating current to a load directly from said integrated circuit chip.
Claim 4
Dependent Claim 29 words
The combination according to claim 1 wherein said comparator means includes means for producing a predetermined hysteresis in the operation of said comparator means as the input signal varies.
Claim 5
Dependent Claim 66 words
The combination according to claim 1 wherein said alarm system further including a common input/output bus; an input/output buffer amplifier stage coupled to the output of said single comparator means; and means for connecting said common input/output bus with said driver circuit means so that output signals are supplied to a load by said driver circuit means whenever signals are applied to said common input/output bus.
Claim 6
Dependent Claim 73 words
The combination according to claim 1 further including a low voltage detection circuit means on said integrated circuit chip for producing a signal on an output thereof whenever the voltage supply to said chip drops below some predetermined value, said low voltage detection circuit having its output connected with said driver circuit means for operating said driver circuit means to supply output signals to the load in response to such low voltage condition.
Claim 7
Dependent Claim 40 words
The combination according to claim 5 further including clock circuit means on said chip for supplying operating pulses to said low voltage detection circuit means to effect operation of said low voltage detection circuit means periodically for predetermined time intervals.
Claim 8
Dependent Claim 51 words
The combination according to claim 6 further including second driver circuit means coupled with said clock circuit means and with the output of said comparator means for supplying output signals to a second load whenever said comparator means produces said alarm signal or said clock circuit means produces said clock pulses.

References Cited (Backward Citations)

US4048575A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-07-29 1984-01-28 1984-07-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-07-29 1988-01-28 1988-07-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-07-29 1992-01-28 1992-07-29 $7700.00 Window Closed / Lapsed

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