Driver circuit for an electrical load with capability for detecting a short in the load

Claim 1

A driver circuit for use with a programmable electronic logic device of the type having at least one bidirectional input/output (I/O) terminal which is pulled up to a normally logic high state when unloaded and pulled down to a logic low state when loaded and further having program-controlled internal switching means for pulling down the I/O terminal to a logic low state by program control, the driver circuit being adapted to drive a d.c. electrical load under normal load conditions and respond to a shorted load under abnormal load conditions, the circuit comprising: a voltage sensing circuit connected between the I/O terminal and a reference potential, the voltage sensing circuit having an I/O terminal sensing point and an output feedback sensing point, the voltage at the I/O terminal sensing point being normally greater than the voltage at the output feedback sensing point under normal load conditions; comparator means, connected to the voltage sensing circuit and responsive to the voltage difference between the I/O terminal sensing point and the output feedback sensing point, for comparing the voltages at the sensing points and producing an output signal at a first level when the I/O terminal sensing point voltage exceeds the output feedback sensing point voltage, and at a second level when the output feedback sensing point voltage exceeds the I/O terminal sensing point voltage; driver switch means, responsive to the output signal of the comparator means, for enabling energization of the electrical load upon the occurrence of a comparator output signal at the first level and disabling energization of the load upon the occurrence of a comparator output signal at the second level; and output feedback means, connected between the driver switch means and the output feedback sensing point, for communicating a feedback voltage to the output feedback sensing point upon the occurrence of a short condition to cause the voltages at the output feedback sensing point and I/O terminal sensing point to enter a logic high state that can be detected by program logic and used to cause the internal switch means to close and pull down the I/O terminal, thereby disabling energization of the electrical load.