Patent US6538649B2 successfully refreshed from Google Patents.
Patent US1973114A successfully refreshed from Google Patents.
Patent US4598989A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4201488A Expired / Lapsed US ⏱️ 0.0 years remaining

Recording/control arrangement for a dot recording machine

Assignee: Compagnie Internationale pour l'Informatique CII-Honeywell Bull SA
•
Filing: 1978-06-12
•
Granted: 1980-05-06
•
Expires: 1998-06-12
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A dot printing matrix head having printing elements on multiple rows and columns is moved so the columns of the head are translated relative to a medium on which characters are printed. The elements have a predetermined arrangement so that: (1) in each column and row there is at least one element, and (2) there are no elements in adjoining row positions whereby there is no interference between the elements in response to simultaneous activation of any pair of the elements. The elements in different columns of the matrix are activated at differing times in response to signals from at least one shift register bank, a data bit generator and a shift column control circuit as the different matrix columns become aligned with the same column of dots to be printed.

Inventors

  • 👤 Cyrille Gosset
  • 👤 Jean-Marc Thomas

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:18
CPC Classifications
B; B41; B41J; B41J2/00; B41J2/22; G; G06; G06K; G06K15/00; G06K15/02; G06K15/10

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 243 words
A recording control apparatus for a dot recording machine including a recording medium and at least one character recording head having n electric pulse responsive recording styli arranged in a matrix of n rows and m columns, at least one stylus being provided in each row, the medium and the head being relatively displaceable in the direction of the rows, the columns being numbered serially as 0, 1, 2, . . . , q, . . . , (m-1) in the direction in which the head moves relative to the recording medium, the control apparatus comprising: at least one bank of n shift registers, each of the registers being associated with one of the recording styli, each register having p+m-1 stages, each of the stages storing a data bit required to cause one dot to be recorded, where p is a whole number at least equal to m, a data bit generator for supplying data bits for the character to be recorded to the first p stages of said registers in the same way as if the recording styli were aligned in a single column, and a shift control circuit for shifting the data bits stored in the first p stages in each register to the other m-1 stages in the register, the number of stages by which the bits are shifted being equal to the serial number q of the column in which the recording stylus associated with the register is located.
Claim 2
Dependent Claim 243 words
A recording control apparatus for a dot recording machine including a recording medium and at least one character recording head having n electric pulse responsive recording styli arranged in a matrix of n rows and m columns, at least one stylus being provided in each row, the medium and the head being relatively displaceable in the direction of the rows, the columns being numbered serially as 0, 1, 2, . . . , q, . . . , (m-1) in the direction in which the head moves relative to the recording medium, the control apparatus comprising: at least one bank of n shift registers, each of the registers being associated with one of the recording styli, each register having p+m-1 stages, each of the stages storing a data bit required to cause one dot to be recorded, where p is a whole number at least equal to m, a data bit generator for supplying data bits for the character to be recorded to the first p stages of said registers in the same way as if the recording styli were aligned in a single column, and a shift control circuit for shifting the data bits stored in the first p stages in each register to the other m-1 stages in the register, the number of stages by which the bits are shifted being equal to the serial number q of the column in which the recording stylus associated with the register is located.
Claim 3
Dependent Claim 184 words
The recording control apparatus of claim 1 wherein the shift control circuit includes a pulse distributor having m-1 outputs and a connecting board, said pulse distributor being responsive to a loading pulse indicating that the data bit generator has loaded the first p stages of the register with the data bits for the character to be recorded so that j pulses are sequentially derived from the jth output in response to each loading pulse from the time at which the distributor is activated by the loading pulse, where j=1, 2, . . . , m-1, the connecting board having: m-1 input and n output terminals, each input terminal being responsive to a different output of the pulse distributor, each output terminal supplying a signal to a different one of the n shift registers, and a set of leads interconnecting each input terminal to one of the output terminals in a predetermined arrangement, the arrangement being such that the register which is associated with the recording stylus situated in the qth column responds to q successive pulses derived from the qth output of the distributor.
Claim 4
Dependent Claim 19 words
The apparatus of claim 2 wherein each of the leads is detachable from at least one of its terminals.
Claim 5
Dependent Claim 61 words
The recording control apparatus of claim 1 or 2 wherein the data bit generator has n outputs, each output of a data bit generator supplying character indicating bits for a particular stylus to a different one of the n shift registers, whereby the data bits derived from each of the generator outputs is stored in the shift register for the stylus.
Claim 6
Dependent Claim 101 words
The recording control apparatus of claim 1 or 2, wherein the machine includes K recording heads, where K is greater than one, K banks of shift registers, each associated with a respective one of the said heads, one register in each bank being associated with a different stylus of the head associated with the bank, and switching means connected between the data bit generator and the banks of registers, said switching means sequentially coupling bits from the data bit generator to the banks until a bank which is responsive to the generator has received all the data bits for one character.
Claim 7
Dependent Claim 94 words
A recording control apparatus of claim 5 wherein the recording heads are identical and each bank includes n shift registers, the data bit generator having n outputs, the switching means including n stepping switches, each of the stepping switches having an input terminal and K output terminals, the input terminal being responsive to a different one of the n outputs of the bit generator, the output terminals of the ith stepping switch being connected to supply bits to all the shift registers in the ith bank, where i=1, 2, . . . , K.
Claim 8
Dependent Claim 86 words
The recording control apparatus according to claim 1 or 2 or 3 further including a clock signal generator having an output coupled to a shift input of all the shift registers, said clock generator including means responsive to an enabling pulse for supplying output pulses to the shift registers so that a binary data bit is derived from each register for each output pulse of the clock signal generator, each binary one data bit derived from a register actuating a recording stylus associated with the register.
Claim 9
Dependent Claim 79 words
The recording control apparatus of claim 7 further including a control unit for activating the data bit generator and the shift control circuit, said unit supplying signals to the generator and shift circuit so the data bit generator initially derives data bits and, when the data bits have been stored in the p locations of the shift registers, the shift control circuit is activated so that the data bits are shifted to the m-1 other locations of the registers.

References Cited (Backward Citations)

US3157456A Cited
US3890623A Cited
US4024506A Cited
US4070680A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-05-06 1983-11-05 1984-05-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-05-06 1987-11-05 1988-05-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-05-06 1991-11-05 1992-05-06 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag