Steered time compressor beam former

Claim 1

In a sonar apparatus, the improvement comprising: a geometrical array comprising a plurality of hydrophones, a plurality of analog-to-digital converters, each converter connected to receive analog signals from a respective hydrophone, a plurality of steered time compressors, each time compressor connected to receive a digital signal from a respective converter, a plurality of first AND gates, each of said first AND gates being connected to receive a digital output signal from a respective compressor and a steered clock signal, a plurality of digital filters, each filter being connected to receive an output signal from a respective one of said first AND gates, a read only store connected to furnish steering commands to each of said steered time compressors and shading commands to each of said digital filters, a summing circuit connected to receive an output signal from each of said digital filters and to furnish a summed output signal to each of a plurality of second AND gates through a serially connected AGC circuit and an analog-to-digital converter, each of said second AND gates being connected to receive a beam select signal, a plurality of beam stores each connected to receive an output signal from a respective second AND gate, a plurality of digital-to-analog converters each connected to receive an output signal from a respective beam store, means to form said steered clock signal comprising a plurality of third AND gates and a bit register, each of said third AND gates being connected to receive an output signal from a respective output of said bit register and a respective fine steering command lead, said bit register being connected to receive a clock frequency on an input terminal and a multiple of said clock frequency on a plurality of shift terminals, said steered time compressor comprising, a shift register made from three serially connected smaller registers each connected to receive a clock frequency on a plurality of shift terminals, a plurality of fourth AND gates each connected to receive an output from said shift register and a coarse steering command, a commoned output of said fourth AND gates being connected to the input of said shift register through a fifth AND gate, and a plurality of sixth AND gates each connected to furnish an output to the input of said shift register and to receive a respective steered sample signal and an output from said analog-to-digital converter through a buffer store.