← Back to Patent Explorer
US4199810A Expired / Lapsed US ⏱️ 0.0 years remaining

Radiation hardened register file

Assignee: Boeing North American Inc
•
Filing: 1977-01-07
•
Granted: 1980-04-22
•
Expires: 1997-01-07
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A radiation hardened register file renders a central processing unit intrinsically hard to the disruptive effects of nuclear radiation by providing means for establishing a valid rollback point for each computer instruction operation performed in the central processing unit. Dual data register images provide alternate locations for storing data operands in the register file. A pointer register stores a signal the truth state of which indicates which of the two images currently provides the proper place to store information presently being written and also provides an indication of the current location of assured valid signals for a recovery operation and resumption of normal computer functions subsequent to a disruptive event. Pointer save registers are used to store the latest value of the signal stored in the pointer registers, thereby also preserving valid pointer information for recovery subsequent to a circumvented disrupting event. A master pointer register stores a signal indicating which of two alternate pointer save registers currently stores the appropriate signal for selecting the proper truth state for the signal in the pointer register.

Inventors

  • 👤 II Thomas L. Gunckel
  • 👤 John S. Irvine

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 02:35
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/14; G06F11/1402; G06F11/1405; G06F11/141

Claims Analysis

Total Claims: 24
Claim 1
Independent Claim 340 words
An information handling apparatus having a central processing unit and a memory unit, the central processing unit having a register file unit for temporarily storing sets of data signals in accordance with instruction signals fetched from the memory unit by the central processing unit, the register file unit comprising: a first plurality of registers, said first plurality having at least one group of alternate data registers for storing each set of data signals fetched from said memory unit in one of said alternate registers selected in accordance with the truth state of a corresponding pointer register; a second plurality of registers, said second plurality having at least one pointer register corresponding to each group of alternate data registers, said pointer register having means for registering the truth state of a pointer signal for selecting one register of a corresponding group of data registers to be utilized for either writing or reading a set of data signals; a third plurality of registers, said third plurality having at least two pointer save registers corresponding to each pointer register for communication with the corresponding pointer register for either storing a pointer save signal representing the truth state of the corresponding pointer register or for forcing the truth state of the corresponding pointer register to a value that corresponds to said pointer save signal; a master pointer register having means for registering the truth state of a pointer selection signal for selecting one of said pointer save registers for communication with the corresponding pointer register; and means for complementing the truth state of each pointer register signal and of the master pointer signal for each occurrence of writing of data signals into a data register in the register file unit; each of said first, second and third pluralities and said master pointer being resistant to disruption of the signals stored respectively therein in response to an otherwise disrupting event, whereby at least one circumvention roll-back point of valid data signals is established for each set of data signals written into said register file unit.
Claim 2
Dependent Claim 340 words
An information handling apparatus having a central processing unit and a memory unit, the central processing unit having a register file unit for temporarily storing sets of data signals in accordance with instruction signals fetched from the memory unit by the central processing unit, the register file unit comprising: a first plurality of registers, said first plurality having at least one group of alternate data registers for storing each set of data signals fetched from said memory unit in one of said alternate registers selected in accordance with the truth state of a corresponding pointer register; a second plurality of registers, said second plurality having at least one pointer register corresponding to each group of alternate data registers, said pointer register having means for registering the truth state of a pointer signal for selecting one register of a corresponding group of data registers to be utilized for either writing or reading a set of data signals; a third plurality of registers, said third plurality having at least two pointer save registers corresponding to each pointer register for communication with the corresponding pointer register for either storing a pointer save signal representing the truth state of the corresponding pointer register or for forcing the truth state of the corresponding pointer register to a value that corresponds to said pointer save signal; a master pointer register having means for registering the truth state of a pointer selection signal for selecting one of said pointer save registers for communication with the corresponding pointer register; and means for complementing the truth state of each pointer register signal and of the master pointer signal for each occurrence of writing of data signals into a data register in the register file unit; each of said first, second and third pluralities and said master pointer being resistant to disruption of the signals stored respectively therein in response to an otherwise disrupting event, whereby at least one circumvention roll-back point of valid data signals is established for each set of data signals written into said register file unit.
Claim 3
Dependent Claim 61 words
The register file unit of claim 1, further comprising: a fourth plurality of registers, said fourth plurality having at least one write control register corresponding to each pointer register, each such write control register having means for registering the truth state of a write control signal for selectively inhibiting the complementing of the truth state of the corresponding pointer register signal.
Claim 4
Dependent Claim 82 words
The register file unit of claim 1, further comprising: nuclear radiation detection means for generating a signal in response to detection of a nuclear radiation event; and means coupling said signal generated by said nuclear radiation detecting means to said central processing unit for initiating a recovery operation; and means responsive to said central processing unit during a recovery operation for employing the most recently established circumvention roll-back-point for establishing normal operations in said information handling apparatus subsequent to said recovery operation.
Claim 5
Dependent Claim 37 words
The register file unit of claim 1 wherein said first, second, third pluralities and said master pointer are provided on a large scale integrated circuit fabricated in the form of a complementary metal oxide semiconductor, silicon-on-sapphire chip.
Claim 6
Dependent Claim 50 words
The register file unit of claim 1 in combination with at least one additional similar register file unit wherein the master pointer register of one such register file unit is slaved to the master pointer register of the other register unit in response to the detection of nuclear radiation events.
Claim 7
Dependent Claim 45 words
The register file unit of claim 1, further comprising: a further plurality of registers, said fourth plurality having at least one status register for registering the truth state of a status signal for representing the status of an operating parameter of said central processing unit.
Claim 8
Dependent Claim 77 words
The register file unit of claim 6, further comprising: a fifth plurality of registers, said fifth plurality having at least two status save registers corresponding to each status register for communication with the corresponding status register for either storing a status save signal representing the truth state of the corresponding status register or for forcing the truth state of the corresponding status register to a value that corresponds to the truth state of said status save signal.
Claim 9
Dependent Claim 329 words
A hard register file unit for use in a general purpose digital computer having a central processing unit and a memory unit, the hardened register file unit providing temporary storage means for sets of data signals for use by the central processing unit in accordance with instruction signals fetched from the memory unit and also providing roll-back points for storing updated sets of data signals that are valid despite the occurrence of a disrupting event that disrupts signals in transit between the register file unit and the other portions of the computer, but which does not disrupt signals already stored in portions of the hard register file unit, the hard register file unit comprising: a plurality of data registers including at least two data registers for storing each set of data signals in either one of a group of alternate data registers in accordance with the truth state of a corresponding pointer register; a plurality of pointer registers including at least one pointer register corresponding to each group of alternate data registers, each such pointer register having means for storing a pointer signal for indicating which one data register of a corresponding group of data registers is to be utilized to recover from a disrupting event; a plurality of pointer save registers including at least two pointer save registers corresponding to each pointer register for communication with the corresponding pointer register for either storing a pointer save signal representing the state of the pointer signal of the corresponding pointer register or for forcing the truth state of the pointer signal of the corresponding pointer register to correspond to said pointer save signal; a master pointer register having means for storing a pointer selection signal for selecting one of said pointer status registers for communication with the corresponding pointer register; and means for inverting the truth state of each pointer register and of the master pointer register each time a set of data signals is written into a data register.
Claim 10
Dependent Claim 329 words
A hard register file unit for use in a general purpose digital computer having a central processing unit and a memory unit, the hardened register file unit providing temporary storage means for sets of data signals for use by the central processing unit in accordance with instruction signals fetched from the memory unit and also providing roll-back points for storing updated sets of data signals that are valid despite the occurrence of a disrupting event that disrupts signals in transit between the register file unit and the other portions of the computer, but which does not disrupt signals already stored in portions of the hard register file unit, the hard register file unit comprising: a plurality of data registers including at least two data registers for storing each set of data signals in either one of a group of alternate data registers in accordance with the truth state of a corresponding pointer register; a plurality of pointer registers including at least one pointer register corresponding to each group of alternate data registers, each such pointer register having means for storing a pointer signal for indicating which one data register of a corresponding group of data registers is to be utilized to recover from a disrupting event; a plurality of pointer save registers including at least two pointer save registers corresponding to each pointer register for communication with the corresponding pointer register for either storing a pointer save signal representing the state of the pointer signal of the corresponding pointer register or for forcing the truth state of the pointer signal of the corresponding pointer register to correspond to said pointer save signal; a master pointer register having means for storing a pointer selection signal for selecting one of said pointer status registers for communication with the corresponding pointer register; and means for inverting the truth state of each pointer register and of the master pointer register each time a set of data signals is written into a data register.
Claim 11
Dependent Claim 60 words
The hard register file unit of claim 8, further comprising: a plurality of write control registers including at least one write control register corresponding to each pointer register, each such write control register having means for registering the truth state of a write control signal for selectively inhibiting the inverting of the truth value of the corresponding pointer register signal.
Claim 12
Dependent Claim 82 words
The hard register file unit of claim 8, further comprising: nuclear radiation detection means for generating a signal in response to detection of a nuclear radiation event; and means coupling said signal generated by said nuclear radiation detecting means to said central processing unit for initiating a recovery operation; and means responsive to said central processing unit during a recovery operation for employing the most recently establishing circumvention roll-back-point for establishing normal operations in said digital computer subsequent to said recovery operation.
Claim 13
Dependent Claim 27 words
The hard register file unit of claim 8 on a large scale integrated circuit generally fabricated in the form of a complementary metal oxide semiconductor, silicon-on-sapphire chip.
Claim 14
Dependent Claim 54 words
The hard register file unit of claim 8 in combination with at least one additional similar hard register file unit wherein the master pointer register of one such hard register file unit is slaved to the master pointer register of the other hard register unit in response to the detection of nuclear radiation events.
Claim 15
Dependent Claim 42 words
The register file unit of claim 8, further comprising: a plurality of status registers having at least one status register for registering the truth state of a status signal for representing the status of an operating parameter of said central processing unit.
Claim 16
Dependent Claim 71 words
The register file unit of claim 13, further comprising: a plurality of status save registers having at least two status save registers corresponding to each status register for communication with the corresponding status register for either storing a status save signal representing the truth state of the corresponding status register or for forcing the truth state of the corresponding status register to a value that corresponds to said status save signal.
Claim 17
Dependent Claim 223 words
In a central processing unit for use in a general purpose digital computer, the combination comprising a plurality of radiation hard memory storage elements, said storage elements being allocated to provide at least one dual set of data storage elements for alternately storing a data word in one of the two sets of such storage elements, one set of said dual set of data storage elements having a valid data word stored therein, an additional storage element corresponding to said dual set of data word storage elements for use as a pointer indicating which set of data storage elements is a current source of a valid data word, an additional set of dual storage elements corresponding to said dual set of data storage elements for storing save signals representing the truth state of a signal stored in said pointer, still another storage element for storing a master pointer signal, the truth state of which indicates which pointer save signal storage element represents the pointer signal truth state to be used to select the proper set of data storage elements for generating a valid data word, and means for charging the truth state of the signals stored respectively in said pointer storage element and in said master pointer storage element each time a data word is stored in a set of data storage elements.
Claim 18
Dependent Claim 223 words
In a central processing unit for use in a general purpose digital computer, the combination comprising a plurality of radiation hard memory storage elements, said storage elements being allocated to provide at least one dual set of data storage elements for alternately storing a data word in one of the two sets of such storage elements, one set of said dual set of data storage elements having a valid data word stored therein, an additional storage element corresponding to said dual set of data word storage elements for use as a pointer indicating which set of data storage elements is a current source of a valid data word, an additional set of dual storage elements corresponding to said dual set of data storage elements for storing save signals representing the truth state of a signal stored in said pointer, still another storage element for storing a master pointer signal, the truth state of which indicates which pointer save signal storage element represents the pointer signal truth state to be used to select the proper set of data storage elements for generating a valid data word, and means for charging the truth state of the signals stored respectively in said pointer storage element and in said master pointer storage element each time a data word is stored in a set of data storage elements.
Claim 19
Dependent Claim 54 words
The combination of claim 15, further comprising: an additional storage element for use as a write control register corresponding to said pointer storage element, said write control register having means for registering the truth state of a write control signal for selectively inhibiting the changing of the truth value of said pointer storage element.
Claim 20
Dependent Claim 71 words
The combination of claim 15, further comprising: nuclear radiation detection means for generating a signal in response to detection of a nuclear radiation event; and means coupling said signal generated by said nuclear radiation detecting means to said central processing unit for initiating a recovery operation; and means responsive to said central processing unit during a recovery operation for establishing normal operations in said digital computer subsequent to said recovery operation.
Claim 21
Dependent Claim 32 words
The combination of claim 15 wherein all of said storage elements are provided on a large scale integrated circuit generally fabricated in the form of a complementary metal oxide semiconductor, silicon-on-sapphire chip.
Claim 22
Dependent Claim 49 words
The combination of claim 15 in combination with at least one additional similar plurality of storage elements wherein the master pointer storage element of one such plurality is slaved to the master pointer storage element of another such plurality in response to the detection of a nuclear radiation event.
Claim 23
Dependent Claim 33 words
The combination of claim 15, further comprising: an additional storage element for registering the truth state of a status signal for representing the status of an operating parameter of said central processing unit.
Claim 24
Dependent Claim 70 words
The combination of claim 20, further comprising: additional storage elements forming at least two status save registers corresponding to each status signal storage element for communication with the corresponding status signal storage element for either storing a status save signal representing the truth state of the corresponding status signal or for forcing the truth state of the corresponding status signal to a value that corresponds to said status save signal.

References Cited (Backward Citations)

US3562716A Cited
US3812468A Cited
US3950729A Cited
US3934227A Cited
US4031374A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-04-22 1983-10-22 1984-04-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-04-22 1987-10-22 1988-04-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-04-22 1991-10-22 1992-04-22 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag