Patent US2184384A successfully refreshed from Google Patents.
US4199697A
Expired / Lapsed
US
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Pulse amplitude modulation sampling gate including filtering
Assignee: Nortel Networks Ltd
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Filing: 1978-07-05
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Granted: 1980-04-22
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Expires: 1998-07-05
Abstract
Abstract The present invention provides a pulse amplitude modulation sampling gate using inexpensive integrated devices having a novel feedback arrangement. The addition of a few passive components to the basic sampling gate allows the gate to coact as a three pole high pass filter. Costs are reduced by this approach by a large factor.
Inventors
- 👤 Gary A. Edwards
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 10:51
CPC Classifications
H; H03; H03K; H03K7/00; H03K7/02; H03H; H03H11/00; H03H11/02; H03H11/04; H03H11/12; H03H11/126; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/6871
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
84 words
A pulse amplitude modulation sampling gate having an input terminal and an output terminal, a differential operational amplifier having an non-inverting input, an inverting input and an output, said input terminal connected to said non-inverting input of said differential input operational amplifier, a first sampling switch connected between said output of said differential input operational amplifier and said output terminal, characterized in that said output terminal, through a second sampling switch is a-c coupled to said inverting input of said differential input operational amplifier.
Claim 2
Dependent Claim
84 words
A pulse amplitude modulation sampling gate having an input terminal and an output terminal, a differential operational amplifier having an non-inverting input, an inverting input and an output, said input terminal connected to said non-inverting input of said differential input operational amplifier, a first sampling switch connected between said output of said differential input operational amplifier and said output terminal, characterized in that said output terminal, through a second sampling switch is a-c coupled to said inverting input of said differential input operational amplifier.
Claim 3
Dependent Claim
27 words
A pulse amplitude modulation sampling gate as claimed in claim 1 wherein said inverting input is a-c coupled to said output terminal by means of a capacitor.
Claim 4
Dependent Claim
50 words
A pulse amplitude modulation sampling gate as claimed in claim 2 wherein said capacitor is connected at the inverting input side thereof, to the output of said differential operational amplifier via a resistance and at the other side thereof via a second resistance to a common terminal of said gate.
Claim 5
Dependent Claim
46 words
A pulse amplitude modulation sampling gate as claimed in claim 3 wherein said input is connected to the non-inverting input terminal of said differential operational amplifier through a second capacitor and said non-inverting input terminal is also connected to said common terminal via a third resistance.
Claim 6
Dependent Claim
200 words
A pulse amplitude modulation sampling gate comprising: input, output and common terminals; a differential input operational amplifier having inverting and non-inverting input terminals and an output terminal; a first capacitor connected between said input terminal and said non-inverting input terminal; a first resistor connected between said non-inverting input terminal and said common terminal; a second resistor connected between said output terminal of said operational amplifier and said inverting terminal thereof; a second capacitor and a third resistor connected in series between said inverting input terminal and said common terminal; first and second analog switches having three terminals each, first and second current carrying terminals and one control terminal; said control terminals connected to accept an external control waveform; said first analog switch having its first current carrying terminal connected to said output terminal of said operational amplifier; said second analog switch having its first current carrying terminal connected to the junction of said second capacitor and said third resistor; said second current carrying terminals of said first and second analog switches connected together; a fourth resistor connected between the junction of said second terminals and said output terminal; a fifth resistor connected between said output terminal and said common terminal.
Claim 7
Dependent Claim
200 words
A pulse amplitude modulation sampling gate comprising: input, output and common terminals; a differential input operational amplifier having inverting and non-inverting input terminals and an output terminal; a first capacitor connected between said input terminal and said non-inverting input terminal; a first resistor connected between said non-inverting input terminal and said common terminal; a second resistor connected between said output terminal of said operational amplifier and said inverting terminal thereof; a second capacitor and a third resistor connected in series between said inverting input terminal and said common terminal; first and second analog switches having three terminals each, first and second current carrying terminals and one control terminal; said control terminals connected to accept an external control waveform; said first analog switch having its first current carrying terminal connected to said output terminal of said operational amplifier; said second analog switch having its first current carrying terminal connected to the junction of said second capacitor and said third resistor; said second current carrying terminals of said first and second analog switches connected together; a fourth resistor connected between the junction of said second terminals and said output terminal; a fifth resistor connected between said output terminal and said common terminal.
Claim 8
Dependent Claim
51 words
A pulse amplitude modulation sampling gate as claimed in claim 5 coacting as a three pole high pass filter comprising additionally: a third capacitor connected between said input terminal and said first capacitor; a sixth resistor connected between the junction of said third and first capacitors and said inverting input terminal.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-04-22 | 1983-10-22 | 1984-04-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-04-22 | 1987-10-22 | 1988-04-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-04-22 | 1991-10-22 | 1992-04-22 | $7700.00 | Window Closed / Lapsed |