US4178558A
Expired / Lapsed
US
⏱️ 0.0 years remaining
DC Level clamping circuit
Assignee: Toshiba Corp
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Filing: 1978-09-26
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Granted: 1979-12-11
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Expires: 1998-09-26
Abstract
Abstract A DC level clamping circuit comprising a differential amplifier circuit constituted by a pair of transistors, a signal source, a first capacitor connected between the signal source and a first input terminal of the amplifier circuit, a second capacitor connected between the ground and a second input terminal of the amplifier circuit and having substantially the same capacity as the first capacitor, a pulse generator, a DC power source and first and second switching elements. The first switching element is connected between the DC power source and the first input terminal of the amplifier circuit, and the second switching element between the DC power source and the second input terminal of the amplifier circuit. These switching elements are controlled by the pulses from the pulse generator in a similar manner.
Inventors
- 👤 Yoshitake Nagashima
- 👤 Kazumasa Noyori
- 👤 Hideki Moriyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 07:12
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/38
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
124 words
A DC level clamping circuit comprising a signal input terminal, a DC power source terminal, a reference power source terminal, a differential amplifier circuit having first and second input terminals, a first capacitor coupled between the signal input terminal and the first input terminal of the differential amplifier circuit, a second capacitor coupled between the reference power source terminal and the second input terminal of the differential amplifier circuit, first and second switching means coupled between the DC power source terminal and the first input terminal of the differential amplifier circuit and between the DC power source terminal and the second input terminal of the differential amplifier circuit, respectively, and control means for controlling the conductive state of the first and second switching means.
Claim 2
Dependent Claim
124 words
A DC level clamping circuit comprising a signal input terminal, a DC power source terminal, a reference power source terminal, a differential amplifier circuit having first and second input terminals, a first capacitor coupled between the signal input terminal and the first input terminal of the differential amplifier circuit, a second capacitor coupled between the reference power source terminal and the second input terminal of the differential amplifier circuit, first and second switching means coupled between the DC power source terminal and the first input terminal of the differential amplifier circuit and between the DC power source terminal and the second input terminal of the differential amplifier circuit, respectively, and control means for controlling the conductive state of the first and second switching means.
Claim 3
Dependent Claim
20 words
A DC level clamping circuit according to claim 1, wherein said first and second capacitors have substantially the same capacity.
Claim 4
Dependent Claim
22 words
A DC level clamping circuit according to claim 1 or 2, further comprising a resistor connected in series to said first capacitor.
Claim 5
Dependent Claim
27 words
A DC level clamping circuit according to claim 1 or 2, further comprising first and second resistors connected in series to said first and second capacitors, respectively.
Claim 6
Dependent Claim
20 words
A DC level clamping circuit according to claim 4, wherein said first and second resistors have substantially the same resistance.
Claim 7
Dependent Claim
76 words
A DC level clamping circuit according to claim 1 or 2, wherein said first and second switching means are constituted each by first and second transistors of which the bases are coupled to said control means and the emitter-collector paths are coupled between said DC power source terminal and the first input terminal of said differential amplifier circuit and between said DC power source terminal and the second input terminal of said differential amplifier circuit, respectively.
References Cited (Backward Citations)
US3308235A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-12-10 | 1983-06-11 | 1983-12-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-12-10 | 1987-06-11 | 1987-12-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-12-10 | 1991-06-11 | 1991-12-11 | $7700.00 | Window Closed / Lapsed |