Temperature compensated bridge circuit

Claim 1

A method for compensating for temperature effects on strain gauges in a bridge circuit which comprises first and second resistors in one arm of the bridge circuit and first and second strain gauges in a second arm of the bridge circuit, said method comprising the steps of: (a) measuring the voltage across said strain gauges at first and second stresses at first and second temperatures when said strain gauges are connected in said bridge circuit with a first value of series resistance in the arm of said bridge circuit in which said strain gauges are located; (b) calculating a resistance which provides for span compensation between said first and second stresses at said first and second temperatures when said span compensation resistance is connected in said bridge in series with said strain gauges; (c) calculating the resistances for a series/parallel network for one of said strain gauges which provides for temperature compensation at said first and second temperatures, assuming that a small portion of the span compensation resistance is in series with the first strain gauge in one diagonal of the arm in which the strain gauges are located and the remaining portion of the span compensation resistance is in series with the second strain gauge in a second diagonal of the arm in which the gauges are located; (d) calculating the output from said bridge circuit at said first stress at both said second temperature and a third temperature between said first and second temperatures using the distribution of span compensation resistance assumed in step (c) and the series/parallel resistance calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the span compensation resistance in said first and second diagonals; (f) comparing the difference in the outputs of the bridge circuit at said second and third temperatures during one execution of step (d) with the difference in the outputs of said bridge circuit at said second and third temperatures during a second execution of step (d); and (g) using in the design of the bridge circuit the distribution of span compensation and the series/parallel resistance for which the difference in the outputs of the bridge circuit at said second and third temperatures is closer to zero.

Claim 2

A method for compensating for temperature effects on strain gauges in a bridge circuit which comprises first and second resistors in one arm of the bridge circuit and first and second strain gauges in a second arm of the bridge circuit, said method comprising the steps of: (a) measuring the voltage across said strain gauges at first and second stresses at first and second temperatures when said strain gauges are connected in said bridge circuit with a first value of series resistance in the arm of said bridge circuit in which said strain gauges are located; (b) calculating a resistance which provides for span compensation between said first and second stresses at said first and second temperatures when said span compensation resistance is connected in said bridge in series with said strain gauges; (c) calculating the resistances for a series/parallel network for one of said strain gauges which provides for temperature compensation at said first and second temperatures, assuming that a small portion of the span compensation resistance is in series with the first strain gauge in one diagonal of the arm in which the strain gauges are located and the remaining portion of the span compensation resistance is in series with the second strain gauge in a second diagonal of the arm in which the gauges are located; (d) calculating the output from said bridge circuit at said first stress at both said second temperature and a third temperature between said first and second temperatures using the distribution of span compensation resistance assumed in step (c) and the series/parallel resistance calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the span compensation resistance in said first and second diagonals; (f) comparing the difference in the outputs of the bridge circuit at said second and third temperatures during one execution of step (d) with the difference in the outputs of said bridge circuit at said second and third temperatures during a second execution of step (d); and (g) using in the design of the bridge circuit the distribution of span compensation and the series/parallel resistance for which the difference in the outputs of the bridge circuit at said second and third temperatures is closer to zero.

Claim 4

A method for compensating for temperature effects on first and second strain gauges in a voltage divider circuit, said method comprising the steps of: (a) measuring the voltage across said strain gauges and a first series resistance at first and second stresses at first and second temperatures; (b) calculating a resistance which provides for span compensation between said first and second stresses at said first and second temperatures when said span compensation resistance is connected in series with said strain gauges; (c) calculating the resistances for a series/parallel network for one of said strain gauges which provides for temperature compensation at said first and second temperatures, assuming that a small portion of the span compensation resistance is in series with the first strain gauge in one portion of the divider circuit and the remaining portion of the span compensation resistance is in series with the second strain gauge in a second portion of the divider circuit; (d) calculating the voltage output at a node between said first and second portions of said divider circuit at said first stress at both said second temperature and a third temperature between said first and second temperatures using the distribution of span compensation resistance assumed in step (c) and the series/parallel resistances calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the span compensation resistance in said first and second portions; (f) comparing the difference in the outputs of the divider circuit at said second and third temperatures during one execution of step (d) with the difference in the outputs of said divider circuit at said second and third temperatures during a second execution of step (d); and (g) using in the design of the divider circuit the distribution of span compensation resistance and the series/parallel resistances for which the difference in the outputs of the divider circuit at said second and third temperatures is closer to zero.

Claim 5

A method for compensating for temperature effects on first and second strain gauges in a voltage divider circuit, said method comprising the steps of: (a) measuring the voltage across said strain gauges and a first series resistance at first and second stresses at first and second temperatures; (b) calculating a resistance which provides for span compensation between said first and second stresses at said first and second temperatures when said span compensation resistance is connected in series with said strain gauges; (c) calculating the resistances for a series/parallel network for one of said strain gauges which provides for temperature compensation at said first and second temperatures, assuming that a small portion of the span compensation resistance is in series with the first strain gauge in one portion of the divider circuit and the remaining portion of the span compensation resistance is in series with the second strain gauge in a second portion of the divider circuit; (d) calculating the voltage output at a node between said first and second portions of said divider circuit at said first stress at both said second temperature and a third temperature between said first and second temperatures using the distribution of span compensation resistance assumed in step (c) and the series/parallel resistances calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the span compensation resistance in said first and second portions; (f) comparing the difference in the outputs of the divider circuit at said second and third temperatures during one execution of step (d) with the difference in the outputs of said divider circuit at said second and third temperatures during a second execution of step (d); and (g) using in the design of the divider circuit the distribution of span compensation resistance and the series/parallel resistances for which the difference in the outputs of the divider circuit at said second and third temperatures is closer to zero.

Claim 7

A method for compensating for environmental effects on first and second electrical devices in a divider circuit, said devices having a resistive, capacitive or inductive output which is a function of two variables, said method comprising the steps of: (a) measuring the resistance, capacitance or inductance across said devices at first and second values of the first variable and at first and second values of the second variable when said devices are connected in said divider circuit with an electrical element which has a resistive, capacitive or inductive output that is substantially constant with respect to said two variables; (b) calculating a resistance, capacitance or inductance which provides for span compensation between said first and second values of the first variable at said first and second values of the second variable when said span compensation resistance, capacitance or inductance is connected in said circuit with said first and second electrical devices; (c) calculating the resistances, capacitances, or inductances for a series/parallel network for one of said electrical devices which provides for compensation at said first and second values of said second variable, assuming that a small portion of the span compensation resistance, capacitance or inductance is connected with the first electrical device in one portion of the divider circuit and the remaining portion is connected with the second electrical device in a second portion of the divider circuit; (d) calculating the output from said divider circuit at said first value of the first variable at both said second value of the second variable and a third value of the second variable between said first and second values using the distribution of span compensation, resistance, capacitance, or inductance assumed in step (c) and the series/parallel resistances, capacitances or inductances calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the span compensation resistance, capacitance or inductance in said first and second portions of the divider circuit; (f) comparing the difference in the outputs of the divider circuit at said second and third values of the second variable during one execution of step (d) with the difference in the outputs of said divider circuit at said second and third values of the second variable during a second execution of step (d); and (g) using in the design of the divider circuit the distribution of span compensation resistance, capacitance, or inductance and the series/parallel resistances, capacitances, or inductances for which the difference in the outputs of the divider circuit at said second and third values of the second variable is closer to zero.

Claim 8

A method for compensating for environmental effects on first and second electrical devices in a divider circuit, said devices having a resistive, capacitive or inductive output which is a function of two variables, said method comprising the steps of: (a) measuring the resistance, capacitance or inductance across said devices at first and second values of the first variable and at first and second values of the second variable when said devices are connected in said divider circuit with an electrical element which has a resistive, capacitive or inductive output that is substantially constant with respect to said two variables; (b) calculating a resistance, capacitance or inductance which provides for span compensation between said first and second values of the first variable at said first and second values of the second variable when said span compensation resistance, capacitance or inductance is connected in said circuit with said first and second electrical devices; (c) calculating the resistances, capacitances, or inductances for a series/parallel network for one of said electrical devices which provides for compensation at said first and second values of said second variable, assuming that a small portion of the span compensation resistance, capacitance or inductance is connected with the first electrical device in one portion of the divider circuit and the remaining portion is connected with the second electrical device in a second portion of the divider circuit; (d) calculating the output from said divider circuit at said first value of the first variable at both said second value of the second variable and a third value of the second variable between said first and second values using the distribution of span compensation, resistance, capacitance, or inductance assumed in step (c) and the series/parallel resistances, capacitances or inductances calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the span compensation resistance, capacitance or inductance in said first and second portions of the divider circuit; (f) comparing the difference in the outputs of the divider circuit at said second and third values of the second variable during one execution of step (d) with the difference in the outputs of said divider circuit at said second and third values of the second variable during a second execution of step (d); and (g) using in the design of the divider circuit the distribution of span compensation resistance, capacitance, or inductance and the series/parallel resistances, capacitances, or inductances for which the difference in the outputs of the divider circuit at said second and third values of the second variable is closer to zero.

Claim 16

A method for compensating for environmental effects on first and second electrical devices in a divider circuit, said devices having a resistive, capacitive or inductive output which is a function of two variables (X, Y), said method comprising the steps of: (a) measuring the resistance, capacitance or inductance across said devices at (C, Z), (C, S), (H, Z) and (H, S), where C and H are first and second values of the first variable and Z and S are first and second values of the second variable, when said devices are connected in said divider circuit with an electrical element which has a resistive, capacitive or inductive output; (b) calculating a resistance, capacitance or inductance which provides for span compensation at C and H when said span compensation resistance, capacitance or inductance is connected in said circuit with said first and second electrical devices; (c) calculating the resistances, capacitances, or inductances for a series/parallel network for one of said electrical devices which provides for constant value compensation at C and H, assuming that a small portion of the span compensation resistance, capacitance or inductance is connected with the first electrical device in one portion of the divider circuit and the remaining portion is connected with the second electrical device in a second portion of the divider circuit; (d) calculating the outputs from said divider circuit at (H, Z) and (M, Z), where M is a third value of the first variable between said first and second values, using the distribution of span compensation resistance, capacitance, or inductance assumed in step (c) and the series/parallel resistances, capacitances or inductances calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the span compensation resistance, capacitance or inductance in said first and second portions of the divider circuit; (f) comparing the difference in the outputs of the divider circuit at (H, Z) and (M, Z) during one execution of step (d) with the difference in the outputs of said divider circuit at (H, Z) and (M, Z) during a second execution of step (d); and (g) using in the design of the divider circuit the distribution of span compensation resistance, capacitance, or inductance and the series/parallel resistances, capacitances, or inductances for which the difference in the outputs of the divider circuit at (H, Z) and (M, Z) is closer to zero.

Claim 17

A method for compensating for environmental effects on first and second electrical devices in a divider circuit, said devices having a resistive, capacitive or inductive output which is a function of two variables (X, Y), said method comprising the steps of: (a) measuring the resistance, capacitance or inductance across said devices at (C, Z), (C, S), (H, Z) and (H, S), where C and H are first and second values of the first variable and Z and S are first and second values of the second variable, when said devices are connected in said divider circuit with an electrical element which has a resistive, capacitive or inductive output; (b) calculating a resistance, capacitance or inductance which provides for span compensation at C and H when said span compensation resistance, capacitance or inductance is connected in said circuit with said first and second electrical devices; (c) calculating the resistances, capacitances, or inductances for a series/parallel network for one of said electrical devices which provides for constant value compensation at C and H, assuming that a small portion of the span compensation resistance, capacitance or inductance is connected with the first electrical device in one portion of the divider circuit and the remaining portion is connected with the second electrical device in a second portion of the divider circuit; (d) calculating the outputs from said divider circuit at (H, Z) and (M, Z), where M is a third value of the first variable between said first and second values, using the distribution of span compensation resistance, capacitance, or inductance assumed in step (c) and the series/parallel resistances, capacitances or inductances calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the span compensation resistance, capacitance or inductance in said first and second portions of the divider circuit; (f) comparing the difference in the outputs of the divider circuit at (H, Z) and (M, Z) during one execution of step (d) with the difference in the outputs of said divider circuit at (H, Z) and (M, Z) during a second execution of step (d); and (g) using in the design of the divider circuit the distribution of span compensation resistance, capacitance, or inductance and the series/parallel resistances, capacitances, or inductances for which the difference in the outputs of the divider circuit at (H, Z) and (M, Z) is closer to zero.

Claim 20

The method of any one of claims 10, 11 or 12 wherein the step of calculating a span compensation resistance, capacitance or inductance uses the resistance, capacitance or inductance values measured by step (a).

Claim 27

A method for compensating for temperature effects on first and second strain gauges in a voltage divider circuit, said method comprising the steps of: (a) measuring the voltage across said strain gauges and a first series resistance at first and second stresses at first and second temperatures; (b) calculating a resistance which provides for spancompensation between said first and second stresses at said first and second temperatures when said span compensation resistance is connected in parallel with said strain gauges; (c) calculating the resistances for a series/parallel network for one of said strain gauges which provides for temperature compensation at said first and second temperatures, assuming that a small portion of the first resistance is in series with the first strain gauge in one portion of the divider circuit and the remaining portion of the first resistance is in series with the second strain gauge in a second portion of the divider circuit; (d) calculating the voltage output at a node between said first and second portions of said divider circuit at said first stress at both said second temperature and a third temperature between said first and second temperatures using the distribution of the first resistance assumed in step (c) and the series/parallel resistances calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the first resistance in said first and second portions; (f) comparing the difference in the outputs of the divider circuit at said second and third temperatures during one execution of step (d) with the difference in the outputs of said divider circuit at said second and third temperatures during a second execution of step (d); and (g) using in the design of the divider circuit the distribution of first resistance and the series/parallel resistances for which the difference in the outputs of the divider circuit at said second and third temperatures is closer to zero.

Claim 28

A method for compensating for temperature effects on first and second strain gauges in a voltage divider circuit, said method comprising the steps of: (a) measuring the voltage across said strain gauges and a first series resistance at first and second stresses at first and second temperatures; (b) calculating a resistance which provides for spancompensation between said first and second stresses at said first and second temperatures when said span compensation resistance is connected in parallel with said strain gauges; (c) calculating the resistances for a series/parallel network for one of said strain gauges which provides for temperature compensation at said first and second temperatures, assuming that a small portion of the first resistance is in series with the first strain gauge in one portion of the divider circuit and the remaining portion of the first resistance is in series with the second strain gauge in a second portion of the divider circuit; (d) calculating the voltage output at a node between said first and second portions of said divider circuit at said first stress at both said second temperature and a third temperature between said first and second temperatures using the distribution of the first resistance assumed in step (c) and the series/parallel resistances calculated in step (c); (e) repeating steps (c) and (d) for at least one other distribution of the first resistance in said first and second portions; (f) comparing the difference in the outputs of the divider circuit at said second and third temperatures during one execution of step (d) with the difference in the outputs of said divider circuit at said second and third temperatures during a second execution of step (d); and (g) using in the design of the divider circuit the distribution of first resistance and the series/parallel resistances for which the difference in the outputs of the divider circuit at said second and third temperatures is closer to zero.