Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
194 words
A circuit for controlling the squelch and unsquelch condition of a radio receiver as a function of a plurality of other conditions comprising: a. a plurality of circuits for connection to said radio receiver, each of said circuits respectively responding to a predetermined condition in said receiver for producing a first signal in response to said condition in said receiver being present; b. a plurality of first gating means each having a plurality of inputs connected to selected ones of said plurality of circuits in a predetermined arrangement, each of said first gating means producing a second signal in response to all its inputs having said first signals applied thereto by said circuits; c. second gating means having a plurality of inputs respectively connected to said plurality of first gating means for producing an unsquelch signal in response to the presence of any one of said second signals and for producing a squelch signal in response to the absence of all of said second signals; d. and first switch means connected to said second gating means for selectively applying a second signal thereto to cause said second gating means to produce an unsquelch signal.
Claim 2
Dependent Claim
194 words
A circuit for controlling the squelch and unsquelch condition of a radio receiver as a function of a plurality of other conditions comprising: a. a plurality of circuits for connection to said radio receiver, each of said circuits respectively responding to a predetermined condition in said receiver for producing a first signal in response to said condition in said receiver being present; b. a plurality of first gating means each having a plurality of inputs connected to selected ones of said plurality of circuits in a predetermined arrangement, each of said first gating means producing a second signal in response to all its inputs having said first signals applied thereto by said circuits; c. second gating means having a plurality of inputs respectively connected to said plurality of first gating means for producing an unsquelch signal in response to the presence of any one of said second signals and for producing a squelch signal in response to the absence of all of said second signals; d. and first switch means connected to said second gating means for selectively applying a second signal thereto to cause said second gating means to produce an unsquelch signal.
Claim 3
Dependent Claim
103 words
The circuit of claim 1 and further comprising second switch means connected to at least two of said first gating means for selectively enabling one of said two first gating means to produce a second signal and for preventing the other of said two first gating means from producing a second signal in a first condition of said second switch means, and for selectively preventing said one of said two first gating means from producing a second signal and for enabling said other of said two first gating means to produce a second signal in a second condition of said second switch means.
Claim 4
Dependent Claim
36 words
The circuit of claim 1 wherein each of said plurality of circuits is removably connected to a respective receptacle, and wherein removal of each of said circuits causes its respective receptacle to produce said first signal.
Claim 5
Dependent Claim
134 words
The circuit of claim 1 and further comprising second switch means connected to at least two of said first gating means for selectively enabling one of said two first gating means to produce a second signal and for preventing the other of said two first gating means from producing a second signal in a first condition of said switch means, and for selectively preventing said one of said two first gating means from producing a second signal and for enabling said other of said two first gating means to produce a second signal in a second condition of said second switch means, and wherein each of said plurality of circuits is removably connected to a respective receptacle, and wherein removal of each of said circuits causes its respective receptacle to produce said first signal.
Claim 6
Dependent Claim
232 words
A circuit for providing squelch and unsquelch signals for a radio receiver as a function of a plurality of conditions in said receiver comprising: a. a plurality of circuit receptacles, each of said receptacles having an input for connection to said radio receiver and an output for producing a first signal in the absence of a response circuit engaging said receptacle; b. a plurality of response circuits removably engaging said receptacles, each of said response circuits respectively responding to a predetermined condition in said radio receiver for producing said first signal in response to said condition in said radio receiver being present and for producing a second signal in response to said condition in said radio receiver being absent; c. a plurality of first gates connected to said plurality of receptacles in a predetermined arrangement, each of said first gates producing respective third signals in response to the presence of a predetermined combination of said first and second signals produced by said response circuits and producing respective fourth signals in response to the absence of said predetermined combination of said first and second signals produced by said response circuits; d. and a second gate connected to said plurality of first gates for producing an unsquelch signal in response to the presence of any one of said third signals and for producing a squelch signal in response to no third signal being present.
Claim 7
Dependent Claim
232 words
A circuit for providing squelch and unsquelch signals for a radio receiver as a function of a plurality of conditions in said receiver comprising: a. a plurality of circuit receptacles, each of said receptacles having an input for connection to said radio receiver and an output for producing a first signal in the absence of a response circuit engaging said receptacle; b. a plurality of response circuits removably engaging said receptacles, each of said response circuits respectively responding to a predetermined condition in said radio receiver for producing said first signal in response to said condition in said radio receiver being present and for producing a second signal in response to said condition in said radio receiver being absent; c. a plurality of first gates connected to said plurality of receptacles in a predetermined arrangement, each of said first gates producing respective third signals in response to the presence of a predetermined combination of said first and second signals produced by said response circuits and producing respective fourth signals in response to the absence of said predetermined combination of said first and second signals produced by said response circuits; d. and a second gate connected to said plurality of first gates for producing an unsquelch signal in response to the presence of any one of said third signals and for producing a squelch signal in response to no third signal being present.
Claim 8
Dependent Claim
91 words
The circuit of claim 5 and further comprising switch means connected to at least two of said first gates for selectively enabling one of said two gates to produce a third signal and for causing the other of said two gates to produce a fourth signal in a first condition of said switch means, and for selectively causing said one of said two gates to produce a fourth signal and for enabling said other of said two gates to produce a third signal in a second condition of said switch means.
Claim 9
Dependent Claim
411 words
A circuit for responding to selected conditions in a radio receiver and producing an unsquelch signal in response to the presence of one or more selected conditions and producing a squelch signal in response to the absence of all of said conditions, said circuit comprising: a. first, second, and third receptacles each having a signal input, a signal output, and a logic terminal; b. means connected to each of said logic terminals for applying a first logic signal thereto; c. means connected to each of said signal outputs of said receptacles for applying a second logic signal thereto; said second logic signal being changed to said first logic signal in response to a circuit connected to said receptacle and the absence of a predetermined signal applied to said signal input of said circuit; and said second logic signal being maintained in response to a circuit being connected to said receptacle and the presence of a predetermined signal applied to said signal input of said circuit; d. first, second, and third AND gates each having a plurality of inputs and an output, each of said AND gates producing a first logic signal at said output in response to a first logic signal at one or more of said inputs and producing a second logic signal at said output in response to second logic signals at all of said inputs; e. means connecting a first input of said first and second AND gates to said signal output of said first receptacle; f. means connecting a second input of said first AND gate and a first input of said third AND gate to said signal output of said second receptacle; g. means connecting a third input of said first AND gate and second inputs of said second and third AND gates to said signal output of said third receptacle; h. means connected to said AND gates for selectively causing only said first AND gate to be responsive to input signals or for causing only said second and third AND gates to be responsive to input signals; i. an OR gate having a plurality of inputs and an output; j. and means connecting each of said OR gate inputs to a respective output of said AND gates for producing an unsquelch signal in response to any one or more second logic signals produced by said AND gates, and for producing a squelch signal in response to all first logic signals produced by said AND gates.
Claim 10
Dependent Claim
411 words
A circuit for responding to selected conditions in a radio receiver and producing an unsquelch signal in response to the presence of one or more selected conditions and producing a squelch signal in response to the absence of all of said conditions, said circuit comprising: a. first, second, and third receptacles each having a signal input, a signal output, and a logic terminal; b. means connected to each of said logic terminals for applying a first logic signal thereto; c. means connected to each of said signal outputs of said receptacles for applying a second logic signal thereto; said second logic signal being changed to said first logic signal in response to a circuit connected to said receptacle and the absence of a predetermined signal applied to said signal input of said circuit; and said second logic signal being maintained in response to a circuit being connected to said receptacle and the presence of a predetermined signal applied to said signal input of said circuit; d. first, second, and third AND gates each having a plurality of inputs and an output, each of said AND gates producing a first logic signal at said output in response to a first logic signal at one or more of said inputs and producing a second logic signal at said output in response to second logic signals at all of said inputs; e. means connecting a first input of said first and second AND gates to said signal output of said first receptacle; f. means connecting a second input of said first AND gate and a first input of said third AND gate to said signal output of said second receptacle; g. means connecting a third input of said first AND gate and second inputs of said second and third AND gates to said signal output of said third receptacle; h. means connected to said AND gates for selectively causing only said first AND gate to be responsive to input signals or for causing only said second and third AND gates to be responsive to input signals; i. an OR gate having a plurality of inputs and an output; j. and means connecting each of said OR gate inputs to a respective output of said AND gates for producing an unsquelch signal in response to any one or more second logic signals produced by said AND gates, and for producing a squelch signal in response to all first logic signals produced by said AND gates.
Claim 11
Dependent Claim
28 words
The circuit of claim 7 and further comprising means for selectively applying a first logic signal or a second logic signal to an input of said OR gate.