Circuit for automatically switching operating modes of feedback-controlled systems

Claim 2

A circuit arrangement for use in a feedback controlled system, comprising first impedance means, an inverting amplifier and a second impedance means all of which are connected in the order named in a series circuit from an input terminal to an output terminal, third impedance means connected between the output terminal and a reference terminal, means for establishing a short circuit path between an input of said inverting amplifier and said output terminal in response to an external signal, said input terminal being connected in use to receive a signal from said feedback controlled system representing the deviation of a controlled variable in said system with respect to said reference terminal, and said output terminal being connected to use to apply a resultant voltage across said third impedance means to said feedback controlled system to compensate for said deviation, said inverting amplifier having such a large value of amplification gain as compared with Z 2 /Z 1 and Z 2 /Z 3 wherein Z 1 , Z 2 and Z 3 are the impedance values of said first, second and third impedance means respectively that in response to the presence of said short circuit path the voltage across said third impedance means is substantially reduced to zero so that the system is considered as operating in an open loop control mode and in response to said switching means disabling said short circuit path said voltage across said third impedance means varies as a function of said deviation representative signal.

Claim 3

A circuit arrangement as claimed in claim 1, further comprising means for detecting the voltage across said second impedance means.

Claim 4

A circuit arrangement as claimed in claim 2, wherein the output of said voltage detecting means is connected to activate said short-circuit establishing means.

Claim 5

A circuit arrangement as claimed in claim 1, wherein said inverting amplifier has a greater input impedance than the impedance value of said first impedance means.

Claim 6

A circuit arrangement as claimed in claim 1, further comprising filter means connected in parallel with said switching means.

Claim 7

A circuit arrangement as claimed in claim 1, wherein each of said first, second and third impedance means comprises a resistor.

Claim 8

A circuit arrangement as claimed in claim 2, wherein said voltage detecting means includes means for generating a single output in response to the voltage across said second impedance means exceeding a predetermined threshold level regardless of the polarity of said voltage.

Claim 9

A circuit arrangement as claimed in claim 7, wherein said voltage detecting means comprises first and second polarity sensitive means respectively responsive to a first and a second polarity of the voltage across said second impedance means to generate first and second polarity signals respectively, means for converting the polarity of said second polarity signal to the first polarity and means for combining said first polarity signal from said first polarity sensitive means and said converted signal from said converting means.

Claim 10

A circuit arrangement as claimed in claim 8, wherein said first and second polarity sensitive means are formed by a pair of first and second transistors of opposite conductivity types having their emitters connected together to one terminal of said second impedance means and having their base electrodes connected together to the other terminal of said second impedance means.

Claim 11

A circuit arrangement as claimed in claim 1, wherein said inverting amplifier comprises an operational amplifier having a noninverting input terminal connected to said reference terminal and an inverting input terminal connected to said first impedance means.

Claim 12

A circuit arrangement as claimed in claim 1, wherein said switching means is a field-effect transistor.

Claim 13

An automatic frequency control circuit for a radio receiver having a mixer and adapted to receive radio signals on frequency-divided channels, comprising, a voltage controlled oscillator to provide a local oscillation signal with which said received signal is mixed in said receiver to generate an intermediate frequency signal, means for detecting the deviation of the intermediate frequency signal from the intermediate frequency signal center frequency, a feedback path having an input terminal connected to the output of said deviation detecting means and an output terminal connected to the input of said voltage-controlled oscillator including first impedance means, an inverting amplifier and second impedance means all of which are connected in the order named from said input terminal to said output terminal, third impedance means connected between said output terminal and a reference terminal, a level detector connected across said second impedance means to provide an output signal when the voltage thereacross exceeds a predetermined threshold level, and switching means connected betwen the input of said inverting amplifier and said output terminal of the feedback path to provide a short-circuit path therebetween in response to the output signal from said level detector, said inverting amplifier having a large value of amplification factor as compared with Z 2 /Z 1 and Z 2 /Z 3 wherein Z 1 , Z 2 and Z 3 are the impedance values of said first, second and third impedance means, respectively.

Claim 14

An automatic frequency control circuit for a radio receiver having a mixer and adapted to receive radio signals on frequency-divided channels, comprising, a voltage controlled oscillator to provide a local oscillation signal with which said received signal is mixed in said receiver to generate an intermediate frequency signal, means for detecting the deviation of the intermediate frequency signal from the intermediate frequency signal center frequency, a feedback path having an input terminal connected to the output of said deviation detecting means and an output terminal connected to the input of said voltage-controlled oscillator including first impedance means, an inverting amplifier and second impedance means all of which are connected in the order named from said input terminal to said output terminal, third impedance means connected between said output terminal and a reference terminal, a level detector connected across said second impedance means to provide an output signal when the voltage thereacross exceeds a predetermined threshold level, and switching means connected betwen the input of said inverting amplifier and said output terminal of the feedback path to provide a short-circuit path therebetween in response to the output signal from said level detector, said inverting amplifier having a large value of amplification factor as compared with Z 2 /Z 1 and Z 2 /Z 3 wherein Z 1 , Z 2 and Z 3 are the impedance values of said first, second and third impedance means, respectively.

Claim 15

An automatic frequency control circuit as claimed in claim 12, further comprising means for imparting a delayed action to said switching means when said receiver is in the process of being switched from detuned to tuned conditions.

Claim 16

An automatic frequency control circuit as claimed in claim 13, wherein said delayed action imparting means is responsive to the output signal from said lever detector to provide a delay interval before said switching means is opened.

Claim 17

An automatic frequency control circuit as claimed in claim 14, wherein said delayed action imparting means comprises a first transistor responsive to the presence of said output signal from said level detector, a storage capacitor for storing electrical energy in response to said first transistor being nonconductive, and a second transistor responsive to the stored electrical energy reaching a predetermined level, said switching means being responsive to the state of said second transistor.

Claim 18

An automatic frequency control circuit as claimed in claim 12, wherein said deviation detecting means comprises a frequency-modulation detector and a lowpass filter connected to the output of the frequency-modulator detector.

Claim 19

An automatic frequency control circuit as claimed in claim 16, wherein said inverting amplifier comprises an operational amplifier having an inverting input terminal receptive of the output of said frequency-modulation detector and a noninverting input terminal connected to said reference terminal, and wherein said lowpass filter is formed by an RC circuit connected in parallel with said switching means to provide a low-impedance path for the high-frequency components of the signal from said frequency-modulation detector when said switching means is not providing said short-cicuit path so that the high-frequency component signal is negatively fed back to said operational amplifier.

Claim 20

An automatic frequency control circuit as claimed in claim 12, wherein said deviation detecting means comprises a frequency modulation detector.

Claim 21

An automatic frequency control circuit as claimed in claim 18, wherein said level detector comprises first and second polarity sensitive means respectively responsive to a first and a second polarity of the voltage across said second impedance means to generate first and second polarity signals respectively, means for converting the polarity of said second polarity signal to the first polarity and means for applying the output of said first polarity sensitive means and the output of said converting means to said switching means.

Claim 22

An automatic frequency control circuit as claimed in claim 19, wherein said first and second polarity sensitive means are formed by a pair of first and second transistors of opposite conductivity types having their emitters connected together to one terminal of said second impedance means and having their base electrodes connected together to the other terminal of said second impedance means.

Claim 23

An automatic frequency control circuit as claimed in claim 12, wherein each of said first, second and third impedance means comprises a resistor.

Claim 24

An automatic frequency control circuit as claimed in claim 12, wherein said inverting amplifier comprises an operational amplifier having a noninverting input terminal connected to said reference terminal and an inverting input terminal connected to said first impedance means.

Claim 25

An automatic frequency control circuit as claimed in claim 22, wherein said switching means is a field-effect transistor.

Claim 26

An automatic frequency control circuit as claimed in claim 12, further comprising a filter capacitor connected across said second impedance means.

Claim 27

An automatic frequency control circuit as claimed in claim 12, further comprising means for detecting the absence of said intermediate frequency signal for activating said switching means.

Claim 28

An automatic frequency control circuit as claimed in claim 12, wherein the relative values of said first and second impedance means are selected such that the detectable range of said lever detector corresponds to the pull-in range of said automatic frequency control circuit in the presence of said short-circuit path and wherein the relative values of said second and third impedance means are selected such that the detectable range of said level detector corresponds to the holding range of said automatic frequency control circuit in the absence of said short-circuit path.