Patent US4687478A successfully refreshed from Google Patents.
US4152657A
Expired / Lapsed
US
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Echo suppression circuit
Assignee: US Philips Corp
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Filing: 1977-06-16
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Granted: 1979-05-01
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Expires: 1997-06-16
Abstract
Abstract A completely automatic suppression of an echo in a video signal is accomplished by using a multiplying circuit in the amplitude and polarity control of a correction signal which must compensate for the echo and an automatic control of the time delay of the correction signal by means of an echo polarity correction switch with which the polarity of the setting of the delay control characteristic is matched to the polarity of the echo to be suppressed.
Inventors
- 👤 Klaas H. J. Robers
- 👤 Henri W. A. M. Hanneman
- 👤 Bastiaan Visser
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 01:21
CPC Classifications
H; H04; H04B; H04B3/00; H04B3/02; H04B3/20
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
129 words
An echo suppression circuit comprising an adder having an input means for receiving a signal having an echo, a control signal input, and an output means for providing a signal with at least a reduced echo; a delay device having an input coupled to said adder output means, a control signal input means for controlling the time delay thereof, and an output; and an automatic echo polarity correction circuit having an input coupled to said delay device ouptut, a first output means coupled to said adder control signal input for supplying a correction signal thereto, and a second output means coupled to said delay device control signal input means for supplying an echo position dependent control signal thereto for automatically adjusting the delay time thereof to the proper value.
Claim 2
Dependent Claim
129 words
An echo suppression circuit comprising an adder having an input means for receiving a signal having an echo, a control signal input, and an output means for providing a signal with at least a reduced echo; a delay device having an input coupled to said adder output means, a control signal input means for controlling the time delay thereof, and an output; and an automatic echo polarity correction circuit having an input coupled to said delay device ouptut, a first output means coupled to said adder control signal input for supplying a correction signal thereto, and a second output means coupled to said delay device control signal input means for supplying an echo position dependent control signal thereto for automatically adjusting the delay time thereof to the proper value.
Claim 3
Dependent Claim
76 words
An echo suppression circuit as claimed in claim 1, wherein the echo polarity correction circuit comprises a multiplying circuit having a first input coupled to said output of the delay device and a second input; and further comprising an echo residual amplitude measuring circuit having an input coupled to the output of the adder circuit and an output coupled to said multiplier second input; said multiplier having an output from which the correction signal is obtained.
Claim 4
Dependent Claim
65 words
An echo suppression circuit as claimed in claim 2, wherein said echo polarity correction circuit further comprises a correction signal polarity detector having an input coupled to said multiplier output and an output, a sign correction switch having a control signal input coupled to said correction signal polarity detector output and a signal input; and a control signal generator coupled to said switch signal input.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-04-30 | 1982-10-30 | 1983-05-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-04-30 | 1986-10-30 | 1987-05-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-04-30 | 1990-10-30 | 1991-05-01 | $7700.00 | Window Closed / Lapsed |