Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
102 words
A track and hold circuit comprising: input means for receiving an input signal; a storage device for receiving a signal from said input means and for storing a signal corresponding to the amplitude of said input signal; output means coupled to said storage device; a pulse detector for detecting a leading edge of a pulse passing from said storage device to said output means; a switch responsive to said detector for isolating said storage device from signals applied to said input means and a delay circuit responsive to said detector for interposing a delay of selectable duration prior to switching said switch.
Claim 2
Dependent Claim
102 words
A track and hold circuit comprising: input means for receiving an input signal; a storage device for receiving a signal from said input means and for storing a signal corresponding to the amplitude of said input signal; output means coupled to said storage device; a pulse detector for detecting a leading edge of a pulse passing from said storage device to said output means; a switch responsive to said detector for isolating said storage device from signals applied to said input means and a delay circuit responsive to said detector for interposing a delay of selectable duration prior to switching said switch.
Claim 3
Dependent Claim
24 words
The system according to claim 1 further comprising a timer circuit responsive to said detector for activating said switch for a first predetermined period.
Claim 4
Dependent Claim
14 words
The system according to claim 1 wherein said storage device includes a non-polar capacitor.
Claim 5
Dependent Claim
69 words
The system according to claim 1 wherein said delay circuit includes a D-type flip-flop, a capacitor connected between the clear input of said flip-flop and a reference potential, the side of said capacitor connected to said "clear" input being connected also to the Q output of said flip-flop, whereby after said flip-flop is clocked, said capacitor discharges to said reference and activates said clear input to reset said flip-flop.
Claim 6
Dependent Claim
15 words
The system according to claim 1 wherein said delay circuit includes a one shot multivibrator.
Claim 7
Dependent Claim
44 words
The system according to claim 2 further comprising a hold circuit responsive to said timer for providing hold commands to a "hold" output of said system, said hold command enduring for a second predetermined period when said switch opens and when said switch closes.
Claim 8
Dependent Claim
35 words
The system according to claim 6 wherein said hold circuit also communicates with said delay circuit to disable said delay circuit for a third predetermined period beginning with the end of said first predetermined period.
Claim 9
Dependent Claim
29 words
The system according to claim 1 further comprising switch means connected to said pulse detector for selecting the polarity of a leading edge to which said pulse detector responds.
Claim 10
Dependent Claim
49 words
The system according to claim 8 wherein said pulse detector includes an operational amplifier and wherein said polarity switch means connects said storage device to a selected one of the inverting and non-inverting inputs of said amplifier and connects a reference potential to the other one of said inputs.
Claim 11
Dependent Claim
42 words
The system according to claim 1 wherein said switch comprises a field effect transistor coupling said input means with said storage device, said transistor having a control gate, coupled to said pulse detector, for receiving signals for opening and closing said switch.
Claim 12
Dependent Claim
44 words
The system according to claim 1 wherein said pulse detector includes an AC pulse amplifier connected to receive signals from said output means and sensitive to the rate of change of said signals and operating to supply an activation signal to said delay circuit.
Claim 13
Dependent Claim
129 words
A circuit for providing signals to determine the amplitude and width of a pulse applied to its input comprising: an input circuit; storage means for storing a signal corresponding to the instantaneous value of the amplitude of the pulse applied to said input circuit; means for detecting the leading edge of said pulse; variable delay means for disconnecting said storage means from said input circuit a selected time after the detection of the leading edge of said pulse; said storage means including means for retaining the value of the signal stored therein at the time of being disconnected from said input circuit; and means for varying the delay of such variable delay means for allowing measurement of the amplitude of the pulse at various points after a leading edge.
Claim 14
Dependent Claim
129 words
A circuit for providing signals to determine the amplitude and width of a pulse applied to its input comprising: an input circuit; storage means for storing a signal corresponding to the instantaneous value of the amplitude of the pulse applied to said input circuit; means for detecting the leading edge of said pulse; variable delay means for disconnecting said storage means from said input circuit a selected time after the detection of the leading edge of said pulse; said storage means including means for retaining the value of the signal stored therein at the time of being disconnected from said input circuit; and means for varying the delay of such variable delay means for allowing measurement of the amplitude of the pulse at various points after a leading edge.
Claim 15
Dependent Claim
41 words
A circuit according to claim 12 wherein said storage means includes a buffer amplifier having a low output impedance and a capacitor coupled at one side to the output of said buffer amplifier and coupled at the other side to ground.
Claim 16
Dependent Claim
31 words
A circuit according to claim 13 further comprising an output amplifier having an input coupled to the ungrounded side of said capacitor and having an output coupled to an output terminal.
Claim 17
Dependent Claim
48 words
A circuit according to claim 14 including a voltage divider network coupled to a selected one of said input circuit and the output of said output amplifier for attenuating by a factor of 1,000 the signal at said output terminal from the signal applied to said input circuit.
Claim 18
Dependent Claim
55 words
A circuit according to claim 14 wherein said means for detecting the leading edge of said pulse includes an AC pulse amplifier having one grounded input and another input coupled to the output of said output amplifier, said pulse amplifier producing an activation signal in response to a predetermined risetime of a signal applied thereto.