Majority charge carrier bipolar diode with fully depleted barrier region at zero bias

Claim 2

A semiconductor device comprising a semiconductor body including first and second semiconductor regions of one conductivity type separated by a barrier region having a net activator concentration of the opposite conductivity type, means for providing a current path in said body between said first and second regions across said barrier regions, the current flow through said barrier region being by charge carriers of said one conductivity type, said first region having a higher doping concentration of the one conductivity type than the second region, said barrier region being sufficiently thin that the depletion layers formed at zero bias with both said first and second regions merge together in said barrier region to substantially deplete at zero bias the whole of said barrier region of mobile charge carriers of both said one and opposite conductivity types.

Claim 3

A semiconductor device as in claim 1, wherein said barrier region is a semiconductor region doped with activator atoms of said opposite conductivity type.

Claim 4

A semiconductor device as in claim 2, wherein said barrier region has a concentration of activators of said opposite conductivity type that is at least two orders of magnitude higher than that of activators of said one conductivity type.

Claim 5

A semiconductor device as in claim 1, wherein said first region adjoins a surface of the semiconductor body and is separated by the barrier region from an underlying semiconductor body portion which comprises said second region.

Claim 6

A semiconductor device as in claim 4, wherein said surface-adjoining first region is laterally bounded by an undepleted annular zone of said opposite conductivity type, which said annular zone laterally separates said first region from part of said second region and extends sufficiently deeply in the body to intersect said barrier region.

Claim 7

A semiconductor device as in claim 5, wherein said undepleted annular zone has a doping which differs from that of said barrier region.

Claim 8

A semiconductor device as in claim 1, wherein said means for providing said current path comprise a first electrode connection which contacts said first region and a second electrode connection to said second region.

Claim 9

A semiconductor device as in claim 1, wherein said first, second, and barrier regions together form a diode the current flow through which is by majority carriers.

Claim 10

A semiconductor device as in claim 1, comprising barrier-forming means that forms a potential barrier with said first region, said first region forming the base region of a transistor that comprises emitter-base and base-collector potential barriers, said emitter-base and base-collector barriers of said transistor being provided by said barrier-forming means and said barrier region respectively, the current flow through said transistor being by majority carriers.

Claim 11

A semiconductor device as in claim 9, wherein said barrier forming means comprise a Schottky electrode which contacts part of said first region and forms the emitter of said transistor.

Claim 12

A semiconductor device as in claim 10, wherein the doping concentration of said first region below said Schottky electrode has a maximum value at a distance from the surface.

Claim 13

A semiconductor device as in claim 9, wherein said body comprises a third region of said one conductivity type that forms the emitter of said transistor and is separated from the underlying first region by a barrier region which forms the emitter-base potential barrier, said emitter-base barrier region being a semiconductor region having said opposite conductivity type impurity concentration which is higher than the doping level of said one conductivity type in said barrier region so as to provide potential barriers to the flow of charge carriers of the one conductivity type from both the first and third regions and to form depletion layers at zero bias with both of said first and third regions, and emitter-base barrier region being sufficiently thin that said depletion layers formed at zero bias with both said first and third regions merge together in said barrier region to substantially deplete at zero bias the whole of said barrier region of mobile charge carriers of both said one and the opposite conductivity types.

Claim 14

A semiconductor device as in claim 9, wherein said transistor comprises a plurality of emitter-base barriers formed with said first region.

Claim 15

A semiconductor device as in claim 1, wherein said second region has a higher doping concentration in the depletion layer formed with said barrier region than in the underlying bulk of said second region.

Claim 16

A semiconductor device as in claim 1, wherein said second region comprises part of an epitaxial layer one conductivity type which is present on a more highly conductive substrate of said one conductivity type, and an electrode connection to said second region contacts said substrate.

Claim 17

A semiconductor device as in claim 1, wherein said second region comprises part of an epitaxial layer one conductivity type which is present on a substrate of the opposite conductivity type, and an electrode connection to said second region contacts the surface of said epitaxial layer part.